Patents by Inventor Jae-sub KIM
Jae-sub KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240406397Abstract: The present disclosure provides a quantization apparatus and method, and an image processing apparatus, capable of improving operation efficiency while suppressing performance degradation due to quantization errors by receiving one of a plurality of matrices obtained for neural network operation in an artificial neural network as an input matrix, dividing the input matrix into a plurality of channels, selecting a quantizer for each channel by analyzing the distribution of element values included in each of the plurality of divided channels, and quantizing element values included in the channels using the selected quantizer.Type: ApplicationFiled: August 25, 2023Publication date: December 5, 2024Inventors: Bum Sub HAM, Jae Hyeon MOON, Do Hyung KIM, Jun Yong CHEON
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Publication number: 20240378178Abstract: The present invention relates to a method and apparatus for re-registering pre-registered identity information in a new identity recognition system. A method of re-registering identity feature information in an identity recognition system according to an embodiment of the present disclosure may include: identifying one or more first identity feature information calculated by the first feature calculation device and stored in a database; generating one or more latent space information by inputting the one or more first identity feature information into a specific model for latent space estimation; generating one or more second identity feature information by inputting the one or more latent space information into a second feature calculation device; and storing the one or more second identity feature information in a new database.Type: ApplicationFiled: February 22, 2024Publication date: November 14, 2024Inventors: Jae Yoon JANG, Jae Hong KIM, Ho Sub YOON
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Patent number: 12142760Abstract: A cathode active material for an all-solid-state battery includes: active material particles; and a coating layer covering at least a portion of the surface of the active material particles, wherein the coating layer includes lithium (Li), niobium (Nb), and at least one element selected from the group consisting of vanadium (V), zirconium (Zr) and combinations thereof.Type: GrantFiled: May 26, 2021Date of Patent: November 12, 2024Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION, ULSAN National Institute of Science and TechnologyInventors: A Reum Ha, Ju Yeong Seong, Yong Gu Kim, In Woo Song, Hong Seok Min, Yong Sub Yoon, Yun Sung Kim, Sung Woo Noh, Yong Jun Jang, Sang Heon Lee, Jae Phil Cho, Hyo Myoung Lee
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Publication number: 20240262799Abstract: Disclosed are methods for treating or ameliorating metabolic diseases, cholestatic liver diseases, disorder of bile acid homeostasis, or organ fibrosis, which includes administering to a subject a therapeutically effective amount of a pharmaceutical composition containing an isoxazole derivative, a racemate, an enantiomer, or a diastereoisomer thereof, or a pharmaceutically acceptable salt of the derivative, the racemate, the enantiomer, or the diastereoisomer.Type: ApplicationFiled: January 23, 2024Publication date: August 8, 2024Applicant: IL DONG PHARMACEUTICAL CO., LTD.Inventors: Jae-Hoon KANG, Hong-Sub LEE, Yoon-Suk LEE, Jin-Ah JEONG, Sung-Wook KWON, Jeong-Guen KIM, Kyung-Sun KIM, Dong-Keun SONG, Sun-Young PARK, Kyeo-Jin KIM, Ji-Hye CHOI, Hey-Min HWANG
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Publication number: 20240263295Abstract: A deposition apparatus includes: a chamber; a deposition source disposed in the chamber; a rotating plate disposed in the chamber, where an inkjet head is fixed to the rotating plate to allow a nozzle plate of the inkjet head to be vertically aligned with the deposition source; and a first driving unit disposed in the chamber, where the first driving unit rotates the rotating plate about a vertical axis.Type: ApplicationFiled: November 16, 2023Publication date: August 8, 2024Inventors: Jae Sik KIM, Woo Yong SUNG, Seung Ho YOON, Hyoung Sub LEE, Hye Min LEE
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Patent number: 11842075Abstract: A storage device comprises a nonvolatile memory configured to store data that is written in size units of a mapping size, and a storage controller configured to transmit a command to the nonvolatile memory. The storage controller includes a host interface configured to receive a write command from a host device, the write command including a command to write first data to a first address, the first data having a first size smaller than the mapping size. The storage controller includes processing circuitry configured to transmit a read command to the nonvolatile memory, to cause the nonvolatile memory to read second data stored in the nonvolatile memory addressed based on the first address, in response to a determination that the first size is smaller than the mapping size and before the first data is received at the storage controller through the host interface.Type: GrantFiled: August 25, 2021Date of Patent: December 12, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Yun Seok Kang, Jae Sub Kim, Yang Woo Roh, Jeong Beom Seo, Kyung Wook Ye
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Patent number: 11789652Abstract: A storage device includes a non-volatile memory; a plurality of cores; a host interface configured to receive a first set command, an I/O command, and an ADMIN command from a host; and a storage controller including a command distribution module configured to be set to a first state according to the first set command, and distribute the I/O command to the plurality of cores according to the set first state. Each of the plurality of cores may be configured to perform an operation instructed by the I/O command and an operation instructed by the ADMIN command on the non-volatile memory in response to the distributed I/O command.Type: GrantFiled: July 28, 2021Date of Patent: October 17, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Bum Hoe Koo, Jae Sub Kim, Yang Woo Roh, Dong Heon Ryu
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Patent number: 11733882Abstract: A memory device executes a method of controlling power of the memory device. The memory device includes a host interface which receives a command from a host and controls an access to the memory device by the host, a register which is accessible by the host and includes a plurality of different regions, a memory access monitor which monitors which region of the plurality of regions the host accesses, and in response thereto generates a monitoring signal, and a power control manager which selects a power-up group of modules of the memory device in accordance with the monitoring signal and which supplies power to the selected power-up group of modules while not supplying power to any modules of the memory device not belonging to the selected power-up group.Type: GrantFiled: November 10, 2020Date of Patent: August 22, 2023Inventors: Nam-Hoon Kim, Jae Sub Kim, Jae Won Song, Se Jeong Jang
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Publication number: 20220236915Abstract: A storage device comprises a nonvolatile memory configured to store data that is written in size units of a mapping size, and a storage controller configured to transmit a command to the nonvolatile memory. The storage controller includes a host interface configured to receive a write command from a host device, the write command including a command to write first data to a first address, the first data having a first size smaller than the mapping size. The storage controller includes processing circuitry configured to transmit a read command to the nonvolatile memory, to cause the nonvolatile memory to read second data stored in the nonvolatile memory addressed based on the first address, in response to a determination that the first size is smaller than the mapping size and before the first data is received at the storage controller through the host interface.Type: ApplicationFiled: August 25, 2021Publication date: July 28, 2022Applicant: Samsung Electronics Co., Ltd.Inventors: Yun Seok KANG, Jae Sub KIM, Yang Woo ROH, Jeong Beom SEO, Kyung Wook YE
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Publication number: 20220156007Abstract: A storage device includes a non-volatile memory; a plurality of cores; a host interface configured to receive a first set command, an I/O command, and an ADMIN command from a host; and a storage controller including a command distribution module configured to be set to a first state according to the first set command, and distribute the I/O command to the plurality of cores according to the set first state. Each of the plurality of cores may be configured to perform an operation instructed by the I/O command and an operation instructed by the ADMIN command on the non-volatile memory in response to the distributed I/O command.Type: ApplicationFiled: July 28, 2021Publication date: May 19, 2022Inventors: Bum Hoe KOO, Jae Sub KIM, Yang Woo ROH, Dong Heon RYU
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Publication number: 20210055871Abstract: A memory device executes a method of controlling power of the memory device. The memory device includes a host interface which receives a command from a host and controls an access to the memory device by the host, a register which is accessible by the host and includes a plurality of different regions, a memory access monitor which monitors which region of the plurality of regions the host accesses, and in response thereto generates a monitoring signal, and a power control manager which selects a power-up group of modules of the memory device in accordance with the monitoring signal and which supplies power to the selected power-up group of modules while not supplying power to any modules of the memory device not belonging to the selected power-up group.Type: ApplicationFiled: November 10, 2020Publication date: February 25, 2021Inventors: NAM-HOON KIM, JAE SUB KIM, JAE WON SONG, SE JEONG JANG
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Patent number: 10866748Abstract: A memory device executes a method of controlling power of the memory device. The memory device includes a host interface which receives a command from a host and controls an access to the memory device by the host, a register which is accessible by the host and includes a plurality of different regions, a memory access monitor which monitors which region of the plurality of regions the host accesses, and in response thereto generates a monitoring signal, and a power control manager which selects a power-up group of modules of the memory device in accordance with the monitoring signal and which supplies power to the selected power-up group of modules while not supplying power to any modules of the memory device not belonging to the selected power-up group.Type: GrantFiled: May 21, 2018Date of Patent: December 15, 2020Assignee: Samsung Electronics Co., Ltd.Inventors: Nam-Hoon Kim, Jae Sub Kim, Jae Won Song, Se Jeong Jang
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Patent number: 10466938Abstract: A method of operating a non-volatile memory system, the method comprising: receiving an access request from a host; generating internal requests by processing the access request by a first central processing unit (CPU) according to a first mapping unit having a first size; and accessing a memory by processing the internal requests by a second CPU according to a second mapping unit having a second size; wherein the first size is different from the second size.Type: GrantFiled: May 17, 2016Date of Patent: November 5, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dong-young Seo, Jae-sub Kim
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Publication number: 20190146695Abstract: A memory device executes a method of controlling power of the memory device. The memory device includes a host interface which receives a command from a host and controls an access to the memory device by the host, a register which is accessible by the host and includes a plurality of different regions, a memory access monitor which monitors which region of the plurality of regions the host accesses, and in response thereto generates a monitoring signal, and a power control manager which selects a power-up group of modules of the memory device in accordance with the monitoring signal and which supplies power to the selected power-up group of modules while not supplying power to any modules of the memory device not belonging to the selected power-up group.Type: ApplicationFiled: May 21, 2018Publication date: May 16, 2019Inventors: NAM-HOON KIM, JAE SUB KIM, JAE WON SONG, SE JEONG JANG
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Publication number: 20170052901Abstract: A method of operating a non-volatile memory system, the method comprising: receiving an access request from a host; generating internal requests by processing the access request by a first central processing unit (CPU) according to a first mapping unit having a first size; and accessing a memory by processing the internal requests by a second CPU according to a second mapping unit having a second size; wherein the first size is different from the second size.Type: ApplicationFiled: May 17, 2016Publication date: February 23, 2017Inventors: Dong-young SEO, Jae-sub KIM