Patents by Inventor Jae Sun No

Jae Sun No has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11941249
    Abstract: A memory device, a host device and a memory system are provided. The memory device may include a plurality of storage units configured to store data, and at least one device controller configured to, receive a read command from at least one host device and to read data stored in the plurality of storage units in response to the read command, the at least one host device including at least one host memory including a plurality of HPB (high performance boosting) entry storage regions, and provide the at least one host device with a response command, the response command indicating an activation or deactivation of the plurality of HPB entry storage regions, the response command including HPB entry type information which indicates a HPB entry type of the HPB entry storage region.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Dong-Woo Kim, Jae Sun No, Byung June Song, Kyoung Back Lee, Wook Han Jeong
  • Patent number: 11775423
    Abstract: A storage device includes a descramble module configured to descramble at least a portion of a read command, which includes logical block address (LBA) information and first meta information, into first signature information and first physical address (PA) information, for accessing a flash memory. A compare module is provided, which is configured to compare the first signature information against stored signature information to thereby determine an equivalency or discrepancy therebetween. An access module is provided, which is configured to use the first PA information to access a data region of the flash memory, upon determination of the equivalency by said compare module.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: October 3, 2023
    Inventors: Dong-Woo Kim, Jae Sun No, Song Ho Yoon, Kyoung Back Lee, Wook Han Jeong
  • Publication number: 20220113877
    Abstract: A memory device, a host device and a memory system are provided. The memory device may include a plurality of storage units configured to store data, and at least one device controller configured to, receive a read command from at least one host device and to read data stored in the plurality of storage units in response to the read command, the at least one host device including at least one host memory including a plurality of HPB (high performance boosting) entry storage regions, and provide the at least one host device with a response command, the response command indicating an activation or deactivation of the plurality of HPB entry storage regions, the response command including HPB entry type information which indicates a HPB entry type of the HPB entry storage region.
    Type: Application
    Filed: June 25, 2021
    Publication date: April 14, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong-Woo KIM, Jae Sun NO, Byung June SONG, Kyoung Back LEE, Wook Han JEONG
  • Publication number: 20210240610
    Abstract: A storage device includes a descramble module configured to descramble at least a portion of a read command, which includes logical block address (LBA) information and first meta information, into first signature information and first physical address (PA) information, for accessing a flash memory. A compare module is provided, which is configured to compare the first signature information against stored signature information to thereby determine an equivalency or discrepancy therebetween. An access module is provided, which is configured to use the first PA information to access a data region of the flash memory, upon determination of the equivalency by said compare module.
    Type: Application
    Filed: April 5, 2021
    Publication date: August 5, 2021
    Inventors: Dong-Woo Kim, Jae Sun No, Song Ho Yoon, Kyoung Back Lee, Wook Han Jeong
  • Patent number: 10997066
    Abstract: A storage device includes a descramble module configured to descramble at least a portion of a read command, which includes logical block address (LBA) information and first meta information, into first signature information and first physical address (PA) information, for accessing a flash memory. A compare module is provided, which is configured to compare the first signature information against stored signature information to thereby determine an equivalency or discrepancy therebetween. An access module is provided, which is configured to use the first PA information to access a data region of the flash memory, upon determination of the equivalency by said compare module.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: May 4, 2021
    Inventors: Dong-Woo Kim, Jae Sun No, Song Ho Yoon, Kyoung Back Lee, Wook Han Jeong
  • Publication number: 20190258567
    Abstract: A storage device includes a descramble module configured to descramble at least a portion of a read command, which includes logical block address (LBA) information and first meta information, into first signature information and first physical address (PA) information, for accessing a flash memory. A compare module is provided, which is configured to compare the first signature information against stored signature information to thereby determine an equivalency or discrepancy therebetween. An access module is provided, which is configured to use the first PA information to access a data region of the flash memory, upon determination of the equivalency by said compare module.
    Type: Application
    Filed: September 18, 2018
    Publication date: August 22, 2019
    Inventors: Dong-Woo Kim, Jae Sun No, Song Ho Yoon, Kyoung Back Lee, Wook Han Jeong