Patents by Inventor Jae-sun Seo

Jae-sun Seo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210082502
    Abstract: A resistive random-access memory (RRAM) system includes an RRAM cell. The RRAM cell includes a first select line and a second select line, a word line, a bit line, a first resistive memory device, a first switching device, a second resistive memory device, a second switching device, and a comparator. The first resistive memory device is coupled between a first access node and the bit line. The first switching device is coupled between the first select line and the first access node. The second resistive memory device is coupled between a second access node and the bit line. The second switching device is coupled between the second select line and the second access node. The comparator includes a first input coupled to the bit line, a second input, and an output.
    Type: Application
    Filed: July 6, 2020
    Publication date: March 18, 2021
    Applicant: Arizona Board of Regents on behalf of Arizona State University
    Inventors: Jae-sun Seo, Shimeng Yu
  • Publication number: 20210006319
    Abstract: An apparatus and method configure a diversity antenna in a portable terminal. The apparatus includes a first antenna, a second antenna, a first communication unit for processing a first communication scheme signal communicated through the first antenna, a second communication unit for processing a second communication scheme signal communicated through the second antenna, and a control unit for configuring the first antenna as a diversity antenna for the second communication unit when the first communication unit is not driven.
    Type: Application
    Filed: September 17, 2020
    Publication date: January 7, 2021
    Inventors: Jae-Min Seo, Eun-Joon Kim, Jae-Sun Park, Dae-Young Oh
  • Patent number: 10827952
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for obtaining an electrocardiographic (ECG) signal of a user; obtaining a feature vector of the ECG signal of the user with neural network based feature extraction. Comparing the feature vector of the ECG signal with a stored feature vector of a registered user. Authenticating the user in response to determining that a similarity of the ECG feature vector of the ECG signal and the stored ECG feature vector of the registered user exceeds a pre-defined threshold value.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: November 10, 2020
    Assignee: Arizona Board of Regents on behalf of Arizona State University
    Inventors: Shihui Yin, Jae-sun Seo, Sang Joon Kim, Chisung Bae
  • Publication number: 20200349247
    Abstract: A smart hardware security engine using biometric features and hardware-specific features is provided. The smart security engine can combine one or more entropy sources, including individually distinguishable biometric features, and hardware-specific features to perform secret key generation for user registration and authentication. Such hybrid signatures may be distinct from person-to-person (e.g., due to the biometric features) and from device-to-device (e.g., due to the hardware-specific features) while varying over time. Thus, embodiments described herein can be used for personal device authentication as well as secret random key generation, significantly reducing the scope of an attack.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 5, 2020
    Applicant: Arizona Board of Regents on behalf of Arizona State University
    Inventors: Jae-sun Seo, Shihui Yin, Sai Kiran Cherupally
  • Publication number: 20200351177
    Abstract: According to the present invention, a device for controlling an operation of at least one electric device including a user interface unit having a conversation display window in which a conversation with the at least one electric device is displayed, a conversation input window configured to receive a character for controlling the operation of the at least one electric device, an icon selection window in which an icon corresponding to the at least one electric device is displayed, and a chatting screen on which a send button for transmitting the character received by the conversation input window is arranged, and a control unit configured to collectively control the operation of the at least one electric device based on a batch control instruction received by the conversation input window.
    Type: Application
    Filed: July 22, 2020
    Publication date: November 5, 2020
    Inventors: Ji Hyun JEON, Hye Jung CHANG, Young Sun SHIN, Sun Young SEO, So Young YUN, Ji Yoon YOON, Eun Kyung HONG, A Ra CHO, Kyung Nam KIM, Jae Seok LEE, Eun Hwa JANG
  • Publication number: 20200331245
    Abstract: An exterior panel for vehicles is provided and includes a core layer having a predetermined curved surface and skin layers disposed along the curved surface of the core layer. Additionally, mid layers are disposed between the core layer and the skin layers, or are disposed on surfaces of the skin layers.
    Type: Application
    Filed: January 13, 2020
    Publication date: October 22, 2020
    Inventors: Kyeong Bae Seo, Kyung Min Yu, Sang Sun Park, Jae Kuk Park, Sun Yoon, Woo Jin Jung, Dong Won Kim, Hye Ryong Jang, Dae Il Lee
  • Patent number: 10810487
    Abstract: A reconfigurable neural network circuit is provided. The reconfigurable neural network circuit comprises an electronic synapse array including multiple synapses interconnecting a plurality of digital electronic neurons. Each neuron comprises an integrator that integrates input spikes and generates a signal when the integrated inputs exceed a threshold. The circuit further comprises a control module for reconfiguring the synapse array. The control module comprises a global final state machine that controls timing for operation of the circuit, and a priority encoder that allows spiking neurons to sequentially access the synapse array.
    Type: Grant
    Filed: August 22, 2016
    Date of Patent: October 20, 2020
    Assignee: International Business Machines Corporation
    Inventors: Bernard V. Brezzo, Leland Chang, Steven K. Esser, Daniel J. Friedman, Yong Liu, Dharmendra S. Modha, Robert K. Montoye, Bipin Rajendran, Jae-sun Seo, Jose A. Tierno
  • Patent number: 10764157
    Abstract: According to the present invention, a device for controlling an operation of at least one electric device including a user interface unit having a conversation display window in which a conversation with the at least one electric device is displayed, a conversation input window configured to receive a character for controlling the operation of the at least one electric device, an icon selection window in which an icon corresponding to the at least one electric device is displayed, and a chatting screen on which a send button for transmitting the character received by the conversation input window is arranged, and a control unit configured to collectively control the operation of the at least one electric device based on a batch control instruction received by the conversation input window.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: September 1, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji Hyun Jeon, Hye Jung Chang, Young Sun Shin, Sun Young Seo, So Young Yun, Ji Yoon Yoon, Eun Kyung Hong, A Ra Cho, Kyung Nam Kim, Jae Seok Lee, Eun Hwa Jang
  • Patent number: 10717859
    Abstract: The present invention relates to a composition for preparing a SAN copolymer, a SAN copolymer, a preparation method therefor, a heat-resistant ABS resin blend comprising the same, and heat-resistant ABS pellets. Specifically, the present invention provides a composition for preparing a SAN copolymer, the composition comprising a monomer mixture, and ethylene glycol dimethacrylate as a chain extender, wherein the monomer mixture comprises 60 to 75 wt % of an ?-methylstyrene monomer and 25 to 40 wt % of an acrylonitrile-based monomer based on the total weight of the monomer mixture; and the ethylene glycol dimethacrylate is contained in an amount of 0.001 to 0.15 parts by weight based on 100 parts by weight of the monomer mixture.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: July 21, 2020
    Assignee: LG CHEM, LTD.
    Inventors: Gyu Sun Kim, Chang Hun Han, Dae Woo Lee, Jae Bum Seo, Jung Tae Park, Eun Jung Choi, Byoung Il Kang, Da Eun Sung
  • Patent number: 10706923
    Abstract: A resistive random-access memory (RRAM) system includes an RRAM cell. The RRAM cell includes a first select line and a second select line, a word line, a bit line, a first resistive memory device, a first switching device, a second resistive memory device, a second switching device, and a comparator. The first resistive memory device is coupled between a first access node and the bit line. The first switching device is coupled between the first select line and the first access node. The second resistive memory device is coupled between a second access node and the bit line. The second switching device is coupled between the second select line and the second access node. The comparator includes a first input coupled to the bit line, a second input, and an output.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: July 7, 2020
    Assignee: Arizona Board of Regents on Behalf of Arizona State University
    Inventors: Jae-sun Seo, Shimeng Yu
  • Patent number: 10696766
    Abstract: The present invention provides a styrene-acrylonitrile (SAN) resin that exhibits significantly improved thermal resistance and, at the same time, can be produced at high productivity and is highly processable and highly moldable; and a method of producing the same by preparing and storing the solution containing a mixture of an N-substituted maleimide monomer and an unsaturated nitrile monomer at a particular temperature, introducing the solution and a styrene polymer into the polymerization reactor separately, and maintaining the first polymerization reactor and the second polymerization reactor at particular respective temperatures, thereby significantly reducing the amounts of oligomers contained in the SAN resin.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: June 30, 2020
    Assignee: LG CHEM, LTD.
    Inventors: Jae Bum Seo, Dae Woo Lee, Jung Tae Park, Gyu Sun Kim, Chang Hun Han
  • Publication number: 20200199280
    Abstract: Provided are a method for preparing a graft copolymer and a graft copolymer prepared thereby, the method comprising: preparing a reaction solution comprising a copolymer comprising a unit derived from a diene-based monomer and a unit derived from an alkene-based monomer, an aromatic vinyl-based monomer, a vinyl cyan-based monomer, and a reaction solvent; and adding the reaction solution to perform primary bulk polymerization at 100 to 110° C., wherein the copolymer comprises the unit derived from a diene-based monomer in an amount of 5 to 10 wt %, and the graft copolymer has an average rubber particle size of 2 to 5?m.
    Type: Application
    Filed: October 26, 2018
    Publication date: June 25, 2020
    Inventors: Jae Bum SEO, Dae Woo LEE, Jung Tae PARK, Gyu Sun KIM, Ji Uk JANG
  • Publication number: 20200203152
    Abstract: Provided are a cleaning device and a method for driving the cleaning device which cleans a wafer after chemical mechanical polishing. The cleaning device includes a cleaning modules and a running beam, the running beam including a first blade and a second blade to insert or remove the wafer with respect to one of the cleaning modules in a second direction, the first blade and the second blade being fixed to the running beam and movable in the second direction, and the cleaning modules including an input module, a megasonic module, a first brush module, a second brush module and a drying module. The driving method includes performing an operation of inserting or removing the wafer in the second direction using the first blade in a first area; and performing an operation of inserting or removing the wafer in the second direction using the second blade in a second area.
    Type: Application
    Filed: July 5, 2019
    Publication date: June 25, 2020
    Inventors: HYUN JOON PARK, JIN YONG KIM, BONG Kl PARK, EUN SUN PARK, JAE HYEON SEO, YOUNG CHUL LEE
  • Publication number: 20200183003
    Abstract: An apparatus and method for identifying a short cut-in vehicle, and a vehicle using the same are disclosed. The apparatus includes a signal conversion unit configured to receive and signal-process a plurality of sensing signals, a computation unit configured to compute state information of a surrounding vehicle detected from the signal-processed signal, a sensor fusion track output unit configured to output a sensor fusion track based on the computed state information of the surrounding vehicle, an occupancy distance map (ODM) output unit configured to output ODM information including a grid map corresponding to a vehicle detection region and an ODM object including a plurality of detection points based on the computed state information of the surrounding vehicle, and a cut-in vehicle identification unit configured to identify a cut-in vehicle based on the output sensor fusion track and ODM information.
    Type: Application
    Filed: November 4, 2019
    Publication date: June 11, 2020
    Inventors: Hoon Lee, Ji Eun Won, Dong Gu Lee, Sang Bok Won, Min Kyun Yoo, Jae Pil Hwang, Hyung Sun Jang, Uk Il Yang, Hyok Jin Chong, Kyoung Jun Lee, Woo Young Lee, Seul Ki Han, Bo Young Yun, Su Min Jo, Seung Joon Lee, Byung Gi Hong, Soo Bin Jeon, Min Ho Park, Gi Hyun Seo, Kyu Ho Park, Jun Kwon Jee
  • Patent number: 10628732
    Abstract: A reconfigurable neural network circuit is provided. The reconfigurable neural network circuit comprises an electronic synapse array including multiple synapses interconnecting a plurality of digital electronic neurons. Each neuron comprises an integrator that integrates input spikes and generates a signal when the integrated inputs exceed a threshold. The circuit further comprises a control module for reconfiguring the synapse array. The control module comprises a global final state machine that controls timing for operation of the circuit, and a priority encoder that allows spiking neurons to sequentially access the synapse array.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: April 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Bernard V. Brezzo, Leland Chang, Steven K. Esser, Daniel J. Friedman, Yong Liu, Dharmendra S. Modha, Robert K. Montoye, Bipin Rajendran, Jae-sun Seo, Jose A. Tierno
  • Patent number: 10614798
    Abstract: Aspects disclosed in the detailed description include memory compression in a deep neural network (DNN). To support a DNN application, a fully connected weight matrix associated with a hidden layer(s) of the DNN is divided into a plurality of weight blocks to generate a weight block matrix with a first number of rows and a second number of columns. A selected number of weight blocks are randomly designated as active weight blocks in each of the first number of rows and updated exclusively during DNN training. The weight block matrix is compressed to generate a sparsified weight block matrix including exclusively active weight blocks. The second number of columns is compressed to reduce memory footprint and computation power, while the first number of rows is retained to maintain accuracy of the DNN, thus providing the DNN in an efficient hardware implementation without sacrificing accuracy of the DNN application.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: April 7, 2020
    Assignee: Arizona Board of Regents on behalf of Arizona State University
    Inventors: Jae-sun Seo, Deepak Kadetotad, Sairam Arunachalam, Chaitali Chakrabarti
  • Patent number: 10570229
    Abstract: The present invention relates to a method of preparing a styrene-based resin having a low oligomer content and a styrene-based resin prepared thereby. The preparation method according to the present invention may prepare a styrene-based resin having a reduced oligomer content by using a polymerization initiator having a 1 hour half-life temperature, which is 5° C. to 25° C. lower than a temperature during polymerization, and controlling devolatilization conditions.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: February 25, 2020
    Assignee: LG Chem, LTD.
    Inventors: Jae Bum Seo, Chang Hun Han, Dae Woo Lee, Jung Tae Park, Gyu Sun Kim
  • Publication number: 20200040115
    Abstract: The present invention relates to a copolymer including 20 to 65 wt % of units derived from an alkyl styrene-based monomer; 10 to 40 wt % of units derived from a (meth)acrylate-based monomer; and 20 to 40 wt % of units derived from vinyl cyan-based monomer, based on the total weight of the copolymer, wherein the residual monomer content is 780 ppm or less, and a method for preparing the same.
    Type: Application
    Filed: July 26, 2018
    Publication date: February 6, 2020
    Inventors: Jae Bum SEO, Dae Woo LEE, Jung Tae PARK, Gyu Sun KIM, Ji Uk JANG
  • Patent number: 10519262
    Abstract: The present invention provides a method of preparing an aromatic vinyl-unsaturated nitrile-based copolymer in which, when an aromatic vinyl-unsaturated nitrile-based copolymer in which a content of a structural unit derived from unsaturated nitrile monomers in the copolymer is in the range of 22 to 30 wt % is prepared, oligomer content and unreacted monomer content are decreased, resulting in excellent heat resistance, significantly improved surface quality, and particularly, reduced generation of residue on a product surface when used in a closed high temperature environment and reduced occurrence of mold deposits during injection molding, and an aromatic vinyl-unsaturated nitrile-based copolymer prepared using the method.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: December 31, 2019
    Assignee: LG CHEM, LTD.
    Inventors: Dae Woo Lee, Chang Hun Han, Jae Bum Seo, Jung Tae Park, Gyu Sun Kim
  • Patent number: 10482372
    Abstract: Systems and methods for an interconnection scheme for reconfigurable neuromorphic hardware are disclosed. A neuromorphic processor may include a plurality of corelets, each corelet may include a plurality of synapse arrays and a neuron array. Each synapse array may include a plurality of synapses and a synapse array router coupled to synapse outputs in a synapse array. Each synapse may include a synapse input, synapse output; and a synapse memory. A neuron array may include a plurality of neurons, each neuron may include a neuron input and a neuron output. Each synapse array router may include a first logic to route one or more of the synapse outputs to one or more of the neuron inputs.
    Type: Grant
    Filed: December 23, 2015
    Date of Patent: November 19, 2019
    Assignee: Intel Corporation
    Inventors: Gregory K. Chen, Jae-Sun Seo