Abstract: A capacitor component includes a body, including a dielectric layer and an internal electrode layer, and an external electrode disposed on the body and connected to the internal electrode layer. At least one hole is formed in the internal electrode layer, and a region, containing at least one selected from the group consisting of indium (In) and tin (Sn), is disposed in the hole. A method of manufacturing a capacitor component includes forming a dielectric green sheet, forming a conductive thin film, including a first conductive material and a second conductive material, on the dielectric green sheet, and sintering the conductive thin film to form an internal electrode layer. The internal electrode layer includes the first conductive material, and a region, including the second conductive material, is formed in the internal electrode layer.

Abstract: A method and a system thereof for producing a digital holographic screen based on multi-hogel printing are proposed. The system includes a light source unit including lasers, a dichroic mirror for RGB three color matching, mirrors, a beam splitter, and an optical shutter, an object beam unit including a spatial filter, a lens, and a mirror, a reference beam unit including a spatial filter, a lens, and a mirror, a diffuser fixing unit including a diffuser holder and a diffuser positioned between the object beam unit and a recording material and configured to scatter and diffuse the object beam, a photomask movement unit including a photomask holder, an XY-translation stage, and a photomask positioned between the reference beam unit and the recording medium and on which a grid-shaped on/off binary pattern is printed, and a controller configured to control the optical shutter and the XY-translation stage.

Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A to semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.

Abstract: A stacked semiconductor package includes: a first semiconductor chip formed with a first through electrode, the first through electrode protruding above a first surface of the first semiconductor chip; a first polymer layer formed over the first surface of the first semiconductor chip such that the first through electrode is exposed by the first polymer layer; a second semiconductor chip having a first surface attached onto the first semiconductor chip by medium of the first polymer layer and a vial hole passing through the second semiconductor chip, the first surface of the second semiconductor chip being formed with a bonding pad having a through hole which corresponds to the first through electrode; and a second through electrode located within the through hole and the via hole and is electrically connected with the first through electrode.

Abstract: A stacked semiconductor package includes: a first semiconductor chip formed with a first through electrode, the first through electrode protruding above a first surface of the first semiconductor chip; a first polymer layer formed over the first surface of the first semiconductor chip such that the first through electrode is exposed by the first polymer layer; a second semiconductor chip having a first surface attached onto the first semiconductor chip by medium of the first polymer layer and a vial hole passing through the second semiconductor chip, the first surface of the second semiconductor chip being formed with a bonding pad having a through hole which corresponds to the first through electrode; and a second through electrode located within the through hole and the via hole and is electrically connected with the first through electrode.

Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A to semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.

Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.

Abstract: A semiconductor chip module includes a first semiconductor chip having first through-electrodes, a second semiconductor chip having second through-electrodes which are electrically connected with the first through-electrodes, first and second test pads, a first connection line which connects the first test pad with one second through-electrode, a second connection line which connects the second test pad with another second through-electrode, third connection lines which connect the remaining second through-electrodes into pairs, and are partially constituted by fuses, and a third semiconductor chip having fourth connection lines which electrically connect the first through-electrodes of the first semiconductor chip into pairs, wherein the first and second is through-electrodes are connected in series between the first test pad and the second test pad by the first connection line, the second connection line, the third connection lines, and the fourth connection lines.

Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.

Abstract: A substrate for a semiconductor package having a reinforcing member that prevents or minimizes distortions is presented. The substrate for the semiconductor package includes a substrate body, an insulation layer, and a reinforcing member. The substrate body has a first region having a plurality of chip mount regions, a second region disposed along a periphery of the first region, a circuit pattern disposed in each chip mount region and a dummy pattern disposed along the second region. The insulation layer covers the first and second regions and has an opening exposing some portion of each circuit pattern. The reinforcing member is disposed in the second region and prevents deflection of the substrate body.

Abstract: A memory module includes a module substrate and a plurality of package units mounted to the module substrate such that they partially overlap each other. Each package unit has at least one memory semiconductor package attached thereto. Each package unit includes a flexible substrate, which has outer terminals provided over a lower surface adjacent to one edge thereof to form electrical connections with the module substrate, and the memory semiconductor package attached to one surface or each of both upper and lower surfaces of the flexible substrate.

Abstract: A substrate for a semiconductor package having a reinforcing member that prevents or minimizes distortions is presented. The substrate for the semiconductor package includes a substrate body, an insulation layer, and a reinforcing member. The substrate body has a first region having a plurality of chip mount regions, a second region disposed along a periphery of the first region, a circuit pattern disposed in each chip mount region and a dummy pattern disposed along the second region. The insulation layer covers the first and second regions and has an opening exposing some portion of each circuit pattern. The reinforcing member is disposed in the second region and prevents deflection of the substrate body.

Abstract: A semiconductor package includes a substrate having a substrate body possessing a first region, a second region which is defined around the first region and a third region which is defined around the second region. Wiring lines are placed on the substrate body, and the wiring lines have first ends that extend to the third region. Connection patterns are placed in the third region and are electrically connected to the first ends of the wiring lines. A semiconductor chip is disposed in the first region and is electrically connected to the respective wiring lines, and a molding member is disposed in the first and second regions and covers the semiconductor chip.

Abstract: A memory module includes a module substrate and a plurality of package units mounted to the module substrate such that they partially overlap each other. Each package unit has at least one memory semiconductor package attached thereto. Each package unit includes a flexible substrate, which has outer terminals provided over a lower surface adjacent to one edge thereof to form electrical connections with the module substrate, and the memory semiconductor package attached to one surface or each of both upper and lower surfaces of the flexible substrate.

Abstract: A method for booting a personal digital assistant (PDA) using an external memory card is provided. The method includes the steps of (a) preparing an external memory card in which a program for selecting a start-up command is stored, (b) executing a specific start-up command by booting the PDA, (c) executing a program for selecting other start-up commands by inserting the external memory card of the step (a) into the PDA when the step (b) is completed, and (d) executing jobs according to the start-up command selected in the step (c). The hardware switch function is replaced by software by executing a specific start-up command in advance and executing other start-up commands through the application program stored in the memory card of the personal computer during the booting of the PDA. Accordingly, it is possible to reduce fabrication expenses of the PDA, to minimize the PDA, and to flexibly cope with the change of the PDA system.