Abstract: A digital frequency detector and a digital phase locked loop (PLL) are provided. The digital frequency detector includes a first conversion unit which outputs a first frequency as first frequency information of a digital type using a first ring oscillator that operates in a high-level period of the first frequency, a second conversion unit which outputs a second frequency as second frequency information of a digital type using a second ring oscillator that operates in a high-level period of the second frequency, and an operation unit which outputs a digital frequency for the first frequency by calculating a ratio of the first frequency information to the second frequency information.

Abstract: An apparatus and method capable of interference signal removal is provided. The receiving apparatus includes a signal reception unit, a sampler which samples signal with carrier wave frequency, a signal filter, and a signal combiner.

Abstract: A variable degeneration impedance supply circuit, including: two alternatively connected transistors; a capacitor circuit having a predetermined capacitance and serially connecting output terminals of the two transistors; and a switch for controlling on/off state between the capacitor circuit and the output terminal, according to a predetermined first control signal. The circuit further includes: at least one sub capacitor circuit arrayed in parallel to the capacitor circuit for serially connecting the output terminals of the two transistors; and at least one sub switch for controlling on/off state between the sub capacitor circuit and the output terminal, according to a predetermined control signal. Therefore, the magnitude of a degeneration impedance can be varied by controlling degeneration capacitance. Moreover, the variable degeneration impedance supply circuit can be advantageously applied to a voltage controlled oscillation circuit and a frequency divider circuit.

Abstract: Provided are an on-chip balun, a transceiver using the on-chip balun, and a method for fabricating the on-chip balun. The on-chip balun includes: a first metal winding including a port grounded and a port to which an unbalanced signal is input; a second winding outputting an induced current generated by the first metal winding as two signals having about equal intensity and a phase difference of about 180°; and a ground shield positioned between the first and second metal windings and having a symmetric structure so as to generate a symmetric parasitic capacitance between the ground shield and the second metal winding. The ground shield can be inserted between the first and second metal windings to remove an asymmetrical parasitic capacitance so as to reduce a phase imbalance and a gain imbalance of an output value of the second metal winding. As a result, a highly balanced on-chip balun can be fabricated.

Abstract: A predistorter that linearizes the nonlinearity of a power amplifier in a system supporting a multimode and a multiband (frequency band). The predistorter includes a field-effect transistor, an impedance transform unit, a first inductor, a first capacitor, and a second capacitor. The field-effect transistor has a source connected to the ground and uses a variable gate bias voltage. The impedance transform unit is connected to a drain of the field-effect transistor to perform impedance transform. The first inductor is connected between the impedance transform unit and a voltage provided to the field-effect transistor. The first capacitor is connected between a power input terminal and the impedance transform unit. The second capacitor is connected between a power output terminal and the impedance transform unit.

Abstract: A high speed passband phase modulation apparatus and method are provided. In the phase modulation apparatus, an RF phase shifter modulates a phase of a local signal that is generated in a VCO according to a digital input. The RF phase shifter is controlled by a phase-controlled loop so that a baseband phase shifter is phased locked to a modulation reference signal from the local signal and a reference clock signal according to the digital input. The phase-controlled loop phase-locks using the modulation reference signal so that the phase-modulated signal generated in the RF phase shifter has a phase value according to the digital input.

Abstract: A small-sized on-chip complementary metal-oxide semiconductor (CMOS) Power Amplifier having improved efficiency is provided herein. The on-chip CMOS power amplifier is capable of improving efficiency and maximizing output thereof by enhancing a K factor, which may cause a problem in a power amplifier having a distributed active transformer structure. The on-chip CMOS power amplifier having an improved efficiency and being fabricated in a small size, the on-chip CMOS power amplifier includes a primary winding located at a first layer, secondary windings located at a second layer, which is an upper part of the first layer, the secondary windings being located corresponding to a position of the primary winding, and a cross section for coupling the second windings with each other.

Abstract: A power amplifier circuit includes: a transformer receiving a first signal and generating a transformed signal from the first signal; and a transistor receiving a second signal having a direct current (DC) component, and generating an output signal. The second signal and the transformed signal are mixed, via a terminal connected with the transformed signal, wherein an envelope of the output signal is controlled by the first signal.

Abstract: A polar transmitter using a binary phase shift key (BPSK) method includes a data dividing unit which divides input data into an amplitude component and a phase component, a frequency synthesizer which produces an I value of a passband having a phase component of an I signal and a Q value of a passband having a phase component of a Q signal, a polar modulation circuit for the I signal which produces an I carrier wave to the I signal using the amplitude component from the data dividing unit and the I value from the frequency synthesizer, a polar modulation circuit for the Q signal which produces a Q carrier wave to the Q signal using the amplitude component and the Q value, and a carrier wave producing unit which combines the I carrier wave and the Q carrier wave thus to produce a carrier wave.

Abstract: Provided is a polar transmitter which increases a modulation rate using a multi-phase generator and includes: a data processor which processes and separates incoming data to an amplitude component and a phase component; a multi-phase generator which generates a plurality of carriers having a plurality of phase components by processing a carrier having a certain frequency; a selection output part which selects and outputs a carrier having a phase substantially equal to the phase component; and a carrier output part which synthesizes the output carrier with the amplitude component and outputs a carrier. Accordingly, the modulation rate of the carrier can be increased and the bandwidth can be extended with the related art polar transmitter. Therefore, the polar transmitter is applicable to the wideband communications, the multi-mode, and the multi-band.

Abstract: A high speed passband phase modulation apparatus and method are provided. In the phase modulation apparatus, an RF phase shifter modulates a phase of a local signal that is generated in a VCO according to a digital input. The RF phase shifter is controlled by a phase-controlled loop so that a baseband phase shifter is phased locked to a modulation reference signal from the local signal and a reference clock signal according to the digital input. The phase-controlled loop phase-locks using the modulation reference signal so that the phase-modulated signal generated in the RF phase shifter has a phase value according to the digital input.

Abstract: A wire-stacked transformer has a first loop supplied with electric power and built with one or more metal plates forming a magnetic field, a second loop disposed in a concentric circle with the first loop and generating induction current, and loop wires disposed between the respective metal plates of the first loop and supplying electric power to each metal plate. Accordingly, efficiency of a power amplifier can be enhanced by reducing the loss of the DAT.

Abstract: Disclosed is a method and an apparatus for self-calibrating direct current (DC) offset and imbalance between orthogonal signals, which may occur in a mobile transceiver. In the apparatus, a transmitter of a mobile terminal functions as a signal generator, and a receiver of the mobile terminal functions as a response characteristic detector. Further, a baseband processor applies test signals to the transmitter, receives the test signals returning from the receiver, and compensates the imbalance and DC offset for the transmitter side and the receiver side by using the test signals.

Abstract: A diode circuit having a passive element property, and an impedance modulator and a direct current (DC) source that use the diode circuit are provided. The diode circuit includes a first diode that generates a predetermined DC and alternating currents (AC) when a radio frequency (RF) signal is applied; and a DC path that is connected in parallel to the first diode, forms a predetermined loop and circulates the DC current within the loop. The DC path includes an inductor or an LC parallel resonator. The DC path includes a second diode that is disposed in the opposite direction to the first diode and connected to the first diode in parallel. The present invention can relieve difficulty in designing an RF circuit.

Abstract: A high efficiency power amplifier with a precise duty cycle is provided for use in a driver or pre-power amplifier of a Radio Frequency (RF) system. The high efficiency power amplifier with an inverter configured by one pair of Metal Oxide Semiconductor (MOS) transistors includes a feedback path for adjusting an input voltage in response to an output voltage between input and output terminals of the inverter and correcting an operation time point of the MOS transistors configuring the inverter. The high efficiency power amplifier can be used for a high efficiency driver to automatically correct duty cycle distortion. When the high efficiency power amplifier is placed in a front stage of various RF power amplifiers, it can be used for a pre-amplifier capable of increasing the efficiency of the RF power amplifier.

Abstract: An inductor with plural coil layers includes a base wafer; a plurality of insulating layers sequentially laminated on one surface of the base wafer; and a plurality of coil layers built in the plurality of insulating layers, respectively, and having different magnetic flux passage areas.

Abstract: A variable degeneration impedance supply circuit, including: two alternatively connected transistors; a capacitor circuit having a predetermined capacitance and serially connecting output terminals of the two transistors; and a switch for controlling on/off state between the capacitor circuit and the output terminal, according to a predetermined first control signal. The circuit further includes: at least one sub capacitor circuit arrayed in parallel to the capacitor circuit for serially connecting the output terminals of the two transistors; and at least one sub switch for controlling on/off state between the sub capacitor circuit and the output terminal, according to a predetermined control signal. Therefore, the magnitude of a degeneration impedance can be varied by controlling degeneration capacitance. Moreover, the variable degeneration impedance supply circuit can be advantageously applied to a voltage controlled oscillation circuit and a frequency divider circuit.

Abstract: Provided are an on-chip balun, a transceiver using the on-chip balun, and a method for fabricating the on-chip balun. The on-chip balun includes: a first metal winding including a port grounded and a port to which an unbalanced signal is input; a second winding outputting an induced current generated by the first metal winding as two signals having about equal intensity and a phase difference of about 180°; and a ground shield positioned between the first and second metal windings and having a symmetric structure so as to generate a symmetric parasitic capacitance between the ground shield and the second metal winding. The ground shield can be inserted between the first and second metal windings to remove an asymmetrical parasitic capacitance so as to reduce a phase imbalance and a gain imbalance of an output value of the second metal winding. As a result, a highly balanced on-chip balun can be fabricated.

Abstract: A predistorter that linearizes the nonlinearity of a power amplifier in a system supporting a multimode and a multiband (frequency band). The predistorter includes a field-effect transistor, an impedance transform unit, a first inductor, a first capacitor, and a second capacitor. The field-effect transistor has a source connected to the ground and uses a variable gate bias voltage. The impedance transform unit is connected to a drain of the field-effect transistor to perform impedance transform. The first inductor is connected between the impedance transform unit and a voltage provided to the field-effect transistor. The first capacitor is connected between a power input terminal and the impedance transform unit. The second capacitor is connected between a power output terminal and the impedance transform unit.

Abstract: A shredded parallel stacked inductor is provided. The shredded parallel stacked inductor includes a substrate, an oxide film formed on the substrate, metallic layers spirally formed within the oxide film, and vias formed in regions of the metallic layers to join the metallic layers in parallel, thus forming a spiral cavity in a center part of the metallic layers.