Patents by Inventor Jae Ung YI

Jae Ung YI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data verification device and a semiconductor device including the same
    Patent number: 9001603
    Abstract: A semiconductor device includes a data verification device. The data verification device includes a data storage unit for storing data to be input to a memory region in response to a first or second control signal, an input data verifier for deactivating an output of a sense amplifier in response to the first control signal and transmitting the input data stored in the data storage unit to an external pad, and a sense-amplifier verifier for transmitting the input data stored in the data storage unit to the sense amplifier upon in response to the second control signal.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: April 7, 2015
    Assignee: SK Hynix Inc.
    Inventor: Jae Ung Yi
  • DATA VERIFICATION DEVICE AND A SEMICONDUCTOR DEVICE INCLUDING THE SAME
    Publication number: 20140063910
    Abstract: A semiconductor device includes a data verification device. The data verification device includes a data storage unit for storing data to be input to a memory region in response to a first or second control signal, an input data verifier for deactivating an output of a sense amplifier in response to the first control signal and transmitting the input data stored in the data storage unit to an external pad, and a sense-amplifier verifier for transmitting the input data stored in the data storage unit to the sense amplifier upon in response to the second control signal.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 6, 2014
    Applicant: SK HYNIX INC.
    Inventor: Jae Ung YI
  • VERIFYING A DATA PATH IN A SEMICONDUCTOR APPARATUS
    Publication number: 20120081982
    Abstract: A semiconductor apparatus includes a memory array configured to store write data transmitted through data transmission lines and transmit stored data to the data transmission line as read data; a data write unit configured to drive the write data to the data transmission lines in response to a data write command; and a data read unit configured to sense the read data transmitted through the data transmission lines in response to a data read command when a data verification signal is deactivated and sense the write data transmitted through the data transmission lines in response to the data write command when the data verification signal is activated.
    Type: Application
    Filed: December 31, 2010
    Publication date: April 5, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Jae Ung YI, Yong Bok AN