Patents by Inventor Jae-Wan Choi
Jae-Wan Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250058565Abstract: An inkjet printing apparatus includes: a plurality of inkjet heads configured to discharge ink, a supply storage device configured to supply the ink to the plurality of inkjet heads, a plurality of supply flow paths configured to move the ink from the supply storage device to the plurality of inkjet heads, a plurality of discharge flow paths configured to move the ink from the plurality of inkjet heads to the supply storage device, and a plurality of by-pass lines directly connecting the plurality of supply flow paths with the plurality of discharge flow paths.Type: ApplicationFiled: April 9, 2024Publication date: February 20, 2025Inventors: Lae Ho KIM, Yu KONTA, Cheong Wan MIN, Jae Bum PAHK, Min Woo LEE, Tae Ho LEE, Jai Hyuk CHOI, Myung Soo HUH
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Patent number: 12217357Abstract: A method of controlling a display device includes rendering a plurality of viewpoint images, generating a plurality of sub-images based on the plurality of viewpoint images and a plurality of mapping pattern images corresponding to the plurality of viewpoint images, generating a single light-field image based on the plurality of sub-images, and outputting the single light-field image.Type: GrantFiled: March 22, 2024Date of Patent: February 4, 2025Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Rang Kyun Mok, Ji Young Choi, Gi Seok Kwon, Jae Joong Kwon, Beom Shik Kim, Jae Wan Park
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Publication number: 20250036299Abstract: A memory package includes a printed circuit board, a first memory device that is stacked on the printed circuit board, and a second memory device stacked on the first memory device. The first memory device includes a first one-time programmable (OTP) block, the second memory device includes a second OTP block different from the first OTP block, and a horizontal distance from one side of the first memory device to the first OTP block is different from a horizontal distance from one side of the second memory device to the second OTP block.Type: ApplicationFiled: August 6, 2024Publication date: January 30, 2025Inventors: JAE-HOON CHOI, SANG-WAN NAM, SANGYONG YOON, KOOKHYUN CHO
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Publication number: 20250007337Abstract: An embodiment stator for an axial flux permanent magnet (AFPM) motor includes a plurality of stator cores arranged in a circumferential direction, each stator core of the plurality of stator cores including a winding portion on which a coil is wound and end portions of a wedge shape on both sides of the winding portion, and a plurality of core support members, each core support member of the plurality of core support members including a pair of first support portions configured to support the end portions, a second support portion connecting a first end of a first one of the pair of first support portions to a first end of a second one of the pair of first support portions, and a third support portion connecting second ends of the pair of first support portions to each other.Type: ApplicationFiled: November 21, 2023Publication date: January 2, 2025Inventors: Dong Hee Lee, Jae Hyuk Seo, Ji Yeon Kim, Jae Wan Choi
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Publication number: 20240251569Abstract: A semiconductor device includes: a substrate; a plurality of memory cells positioned over the substrate, each of the plurality of memory cells having a multi-layer structure including a memory pattern; a sealing layer pattern filling a lower portion of a space between the memory cells, the lower portion being positioned below a bottom surface of the memory pattern; a liner layer pattern formed along a surface of an upper portion of the space to partially fill the upper portion; and a dielectric layer pattern filling a remaining portion of the space unfilled by the sealing layer pattern and the liner layer pattern.Type: ApplicationFiled: July 3, 2023Publication date: July 25, 2024Inventors: Chi Ho KIM, Kyung Seop KIM, Hun KIM, Young Cheol SONG, Chang Jun YOO, Jae Wan CHOI
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Publication number: 20240232581Abstract: A device including processors configured to execute instructions and memories storing the instructions, which when executed by the processors configure the processors to perform an operation for training a transformer model having a plurality of encoders and a plurality of decoders by configuring the processors to identify the batches of training data into a plurality of micro-batches, select layer pairs for the plurality of micro-batches, assemble a processing order of the layer pairs, determining resource information to be allocated to the layer pairs, and allocate resources to the layer pairs based on the determined resource information to be allocated to the layer pairs, dependent con the processing order of the layer pairs.Type: ApplicationFiled: August 16, 2023Publication date: July 11, 2024Applicants: SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB FoundationInventors: Jung Ho AHN, Sun Jung LEE, Jae Wan CHOI
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Publication number: 20240215468Abstract: A semiconductor device is provided. The semiconductor device according to an implementation of the disclosed technology may include a variable resistance layer; a selector layer disposed over or under the variable resistance layer; a first protective layer disposed on sidewalls of the variable resistance layer and sidewalls of the selector layer, the first protective layer including silicon (Si) and nitrogen (N) and having a nitrogen (N) content higher than a silicon (Si) content; and a second protective layer disposed over the first protective layer, the second protective layer including silicon (Si) and nitrogen (N) and having a silicon (Si) content higher than a nitrogen (N) content.Type: ApplicationFiled: July 5, 2023Publication date: June 27, 2024Inventors: Kyung Seop KIM, Chi Ho Kim, Young Cheol Song, Jae Wan Choi
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Publication number: 20240184630Abstract: A device and method with batch normalization are provided. An accelerator includes: core modules, each core module including a respective plurality of cores configured to perform a first convolution operation using feature map data and a weight; local reduction operation modules adjacent to the respective core modules, each including a respective plurality of local reduction operators configured to perform a first local operation that obtains first local statistical values of the corresponding core module; a global reduction operation module configured to perform a first global operation that generates first global statistical values of the core module based on the first local statistical values of the core modules; and a normalization operation module configured to perform a first normalization operation on the feature map data based on the first global statistical values.Type: ApplicationFiled: December 1, 2023Publication date: June 6, 2024Applicants: Samsung Electronics Co., Ltd., Seoul National University R&DB FoundationInventors: Jung Ho AHN, Sun Jung LEE, Jae Wan CHOI, Seung Hwan HWANG
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Publication number: 20240135147Abstract: A device including processors configured to execute instructions and memories storing the instructions, which when executed by the processors configure the processors to perform an operation for training a transformer model having a plurality of encoders and a plurality of decoders by configuring the processors to identify the batches of training data into a plurality of micro-batches, select layer pairs for the plurality of micro-batches, assemble a processing order of the layer pairs, determining resource information to be allocated to the layer pairs, and allocate resources to the layer pairs based on the determined resource information to be allocated to the layer pairs, dependent con the processing order of the layer pairs.Type: ApplicationFiled: August 15, 2023Publication date: April 25, 2024Applicants: SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB FoundationInventors: Jung Ho AHN, Sun Jung LEE, Jae Wan CHOI
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Patent number: 11833903Abstract: A hybrid powertrain of a vehicle, includes an input shaft provided concentric with an engine rotation shaft, a coaxial magnetic gear device provided to connect the engine rotation shaft to the input shaft, a differential device constantly connected to the input shaft, a first motor constantly connected to the engine rotation shaft, and a second motor continuously engaged to the differential device.Type: GrantFiled: September 16, 2022Date of Patent: December 5, 2023Assignees: Hyundai Motor Company, Kia CorporationInventors: Min Ho Chae, Jae Wan Choi
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Publication number: 20230369933Abstract: A stator of a motor has a structure including a plate portion coupled to a support structure for fixing a stator core and protrusions inserted into a bobbin. The support structure for fixing the stator core has a structure into which the protrusions of the stator core are inserted and extend into and on which the plate portion of the stator core is inserted and seated. The plate portion of the stator core is joined to the support structure while being coplanar with the support structure. Accordingly, the distance of a gap between the stator core of the stator and a permanent magnet of a rotor is minimized, thereby improving the performance of the motor.Type: ApplicationFiled: November 30, 2022Publication date: November 16, 2023Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventors: Dong Hee Lee, Jae Wan Choi, Sung Gon Byun, Ji Yeon Kim
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Publication number: 20230311634Abstract: The present disclosure comprises a dual-rotor motor having an inner rotor and an outer rotor, a stator disposed between the inner rotor and the outer rotor, a cooling passage provided inside of the stator to block a magnetic path between inside and outside of the stator, and a refrigerant flowing through the cooling passage.Type: ApplicationFiled: September 21, 2022Publication date: October 5, 2023Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventors: Min Ho Chae, Jae Wan Choi
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Publication number: 20230294504Abstract: A hybrid powertrain of a vehicle, includes an input shaft provided concentric with an engine rotation shaft, a coaxial magnetic gear device provided to connect the engine rotation shaft to the input shaft, a differential device constantly connected to the input shaft, a first motor constantly connected to the engine rotation shaft, and a second motor continuously engaged to the differential device.Type: ApplicationFiled: September 16, 2022Publication date: September 21, 2023Applicants: Hyundai Motor Company, Kia CorporationInventors: Min Ho CHAE, Jae Wan CHOI
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Patent number: 11566438Abstract: A mobility hub is composed of a plurality of layers and serves as a terminal of a ground mobility and an air mobility. The mobility hub includes: a ground layer provided with an entrance of the ground mobility; a port layer provided with a taking-off and landing site of the air mobility; and a middle layer provided between the ground layer and the port layer. The middle layer has the ground mobility elevating in a space with the ground layer, is provided with a plurality of connection slots to which the ground mobility is connected, and provides an activity space through the ground mobility if the ground mobility is coupled to the connection slot.Type: GrantFiled: February 25, 2021Date of Patent: January 31, 2023Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATIONInventors: Sueng Ho Lee, Sun Sung Kwon, Byung Hoon Yang, Jeong Mo Jang, Kwang Hyun Won, So Ra Roh, Jae Wan Choi, Min Su Kim, Yoh Han Kim, Ji Hwan Byun
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Publication number: 20220270966Abstract: An integrated circuit includes first power supply lines which extend in a first direction and are spaced apart from each other in a second direction different from the first direction. A second power supply line extends in the first direction and is placed between the first power supply lines adjacent to each other in the second direction. A decoupling filler cell is placed between the first power supply lines adjacent to each other in the second direction. The decoupling filler cell includes a decoupling capacitor region formed by a gate electrode and a decap transistor including a first source/drain region of a first conductive type. The gate electrode is connected to the second power supply line, the first source/drain region is connected to the first power supply lines, and the second power supply line passes through the decoupling capacitor region.Type: ApplicationFiled: October 27, 2021Publication date: August 25, 2022Inventors: SHIN WOO KIM, CHANG BEOM KIM, JAE HA LEE, DOO HEE CHO, JAE WAN CHOI
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Publication number: 20220112736Abstract: A mobility hub is composed of a plurality of layers and serves as a terminal of a ground mobility and an air mobility. The mobility hub includes: a ground layer provided with an entrance of the ground mobility; a port layer provided with a taking-off and landing site of the air mobility; and a middle layer provided between the ground layer and the port layer. The middle layer has the ground mobility elevating in a space with the ground layer, is provided with a plurality of connection slots to which the ground mobility is connected, and provides an activity space through the ground mobility if the ground mobility is coupled to the connection slot.Type: ApplicationFiled: February 25, 2021Publication date: April 14, 2022Applicants: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATIONInventors: Sueng Ho Lee, Sun Sung Kwon, Byung Hoon Yang, Jeong Mo Jang, Kwang Hyun Won, So Ra Roh, Jae Wan Choi, Min Su Kim, Yoh Han Kim, Ji Hwan Byun
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Publication number: 20170335186Abstract: A phosphor composition of an embodiment and a light emitting device package including the same includes: a green phosphor excited by blue light to emit green light; a first red phosphor of a nitride series which is excited by the blue light and emits first red light; and a second red phosphor of a fluorine series which is excited by the blue light and emits second red light, and is capable of emitting white light without deterioration of optical characteristics at a high temperature while improving luminous flux and color reproduction rate as compared with a light emitting device package including a conventional phosphor composition.Type: ApplicationFiled: December 9, 2015Publication date: November 23, 2017Applicant: LG INNOTEK CO., LTD.Inventors: Ji Wook MOON, Hyoung Jin KIM, Jeong Yoon MOON, Jae Wan CHOI
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Publication number: 20170084789Abstract: A light emitting device can include a supporting layer; a semiconductor structure including: an active layer between first-type and second-type semiconductor layers, a first top surface and a first bottom surface, and a side surface between the first top and bottom surfaces, which is inclined; a first electrode between the supporting and semiconductor layers; a connection metal layer having a first portion between the first electrode and the supporting layer, which includes a stepped portion having a upper portion contacting the first electrode, and a second portion of the connection metal layer extends beyond the semiconductor structure; and a passivation layer extending from the second portion of the connection metal layer to the side surface of the semiconductor structure, which includes a second bottom surface contacting the second portion of the connection metal layer; and a second top surface opposite to the second bottom surface.Type: ApplicationFiled: December 1, 2016Publication date: March 23, 2017Applicants: LG Electronics Inc., LG Innotek Co., Ltd.Inventors: Jun Ho JANG, Jae Wan CHOI, Duk Kyu BAE, Hyun Kyong CHO, Jong Kook PARK, Sun Jung KIM, Jeong Soo LEE
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Patent number: 9530936Abstract: An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate.Type: GrantFiled: December 4, 2013Date of Patent: December 27, 2016Assignees: LG Electronics Inc., LG Innotek Co., Ltd.Inventors: Jun Ho Jang, Jae Wan Choi, Duk Kyu Bae, Hyun Kyong Cho, Jong Kook Park, Sun Jung Kim, Jeong Soo Lee
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Patent number: RE45217Abstract: A semiconductor light emitting device and a fabrication method thereof includes: providing a substrate; forming an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer on the substrate; forming a first transparent electrode having holes per a certain region on the p-type semiconductor layer; and forming a first pad on the first transparent electrode. A method of fabricating a semiconductor light emitting device, and which includes forming a light emitting layer on the first type semiconductor layer; forming a second type semiconductor layer on the light emitting layer; forming a first transparent electrode on the second type semiconductor layer, the first transparent electrode having holes per a certain region to thereby expose the second type semiconductor layer; forming a second transparent electrode on the first transparent electrode; forming a first pad on the second transparent electrode; and forming a second pad over the first type semiconductor layer.Type: GrantFiled: September 16, 2008Date of Patent: October 28, 2014Assignee: LG Electronics Inc.Inventors: Jun-Seok Ha, Jun-Ho Jang, Jae-Wan Choi, Jung-Hoon Seo