Abstract: A thin film transistor, a method of fabricating the thin film transistor, and an organic light emitting diode (OLED) display device equipped with the thin film transistor of which the thin film transistor includes a substrate, a buffer layer disposed on the substrate, a first semiconductor layer and a second semiconductor layer disposed on the buffer layer, a gate electrode insulated from the first semiconductor layer and the second semiconductor layer, a gate insulating layer insulating the gate electrode from the first semiconductor layer and the second semiconductor layer, and source and drain electrodes insulated from the gate electrode and partially connected to the second semiconductor layer, wherein the second semiconductor layer is disposed on the first semiconductor layer.

Abstract: A thin film transistor includes a substrate, a semiconductor layer provided on the substrate and crystallized by using a metal catalyst, a gate electrode insulated from and disposed on the semiconductor layer, and a getter layer disposed between the semiconductor layer and the gate electrode and formed with a metal oxide having a diffusion coefficient that is less than that of the metal catalyst in the semiconductor layer.

Abstract: An atomic layer deposition apparatus includes a chamber, a vacuum pump to control a pressure in the chamber, a gas supply unit to supply a reaction gas into the chamber, a substrate holder disposed between the vacuum pump and the gas supply unit and having a heater, a mask assembly disposed between the substrate holder and the gas supply unit and having a cooling path to move coolant, and a coolant source to supply the coolant into the cooling path. The mask assembly is positioned a first distance from a substrate, and coolant is supplied into the cooling path of the mask assembly. The substrate is heated using the heater of the substrate holder, a pressure of the chamber is controlled using the vacuum pump, and reaction gasses are sequentially supplied through the gas supply unit.

Abstract: A substrate including a thin film transistor, the substrate including an active layer disposed on the substrate, the active layer including a channel area and source and drain areas, a gate electrode disposed on the active layer, the channel area corresponding to the gate electrode, a gate insulating layer interposed between the active layer and the gate electrode, an interlayer insulating layer disposed to cover the active layer and the gate electrode, the interlayer insulating layer having first and second contact holes partially exposing the active layer, source and drain electrodes disposed on the interlayer insulating layer, the source and drain areas corresponding to the source and drain electrodes, and ohmic contact layers, the ohmic contact layers being interposed between the interlayer insulating layer and the source and drain electrodes, and contacting the source and drain areas through the first and second contact holes.

Abstract: A thin film transistor includes a substrate, a buffer layer on the substrate, a semiconductor layer including source/drain regions and a channel region on the buffer layer, a gate insulating layer corresponding to the channel region, a gate electrode corresponding to the channel region, and source/drain electrodes electrically connected to the semiconductor layer. A polysilicon layer of the channel region may include only a low angle grain boundary, and a high angle grain boundary may be disposed in a region of the semiconductor layer that is apart from the channel region.

Abstract: An apparatus for thermally processing a plurality of substrates including a process chamber into which a boat having a plurality of substrates stacked thereon is loaded, and a heater chamber separate from the process chamber and having a plurality of heaters to apply heat to the process chamber. Here, the heaters are installed to correspond to all sides of the plurality of substrates. Therefore, it is possible to minimize a temperature distribution in the process chamber and uniformly supply heat to the entire region of the plurality of substrates.

Abstract: A substrate including a thin film transistor, the substrate including an active layer disposed on the substrate, the active layer including a channel area and source and drain areas, a gate electrode disposed on the active layer, the channel area corresponding to the gate electrode, a gate insulating layer interposed between the active layer and the gate electrode, an interlayer insulating layer disposed to cover the active layer and the gate electrode, the interlayer insulating layer having first and second contact holes partially exposing the active layer, source and drain electrodes disposed on the interlayer insulating layer, the source and drain areas corresponding to the source and drain electrodes, and ohmic contact layers, the ohmic contact layers being interposed between the interlayer insulating layer and the source and drain electrodes, and contacting the source and drain areas through the first and second contact holes.

Abstract: A method of crystallizing a silicon layer and a method of manufacturing a TFT, the method of crystallizing a silicon layer including forming a catalyst metal layer on a substrate; forming a catalyst metal capping pattern on the catalyst metal layer; forming a second amorphous silicon layer on the catalyst metal capping pattern; and heat-treating the second amorphous silicon layer to form a polycrystalline silicon layer.

Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.

Abstract: A thin film transistor includes a substrate, a semiconductor layer provided on the substrate and crystallized by using a metal catalyst, a gate electrode insulated from and disposed on the semiconductor layer, and a getter layer disposed between the semiconductor layer and the gate electrode and formed with a metal oxide having a diffusion coefficient that is less than that of the metal catalyst in the semiconductor layer.

Abstract: A method for forming a polycrystalline silicon layer includes: forming an amorphous silicon layer on a substrate; forming a metal catalyst on the amorphous silicon layer; forming a gettering metal layer on an overall surface of the amorphous silicon layer where the metal catalyst is formed; and performing a heat treatment. A thin film transistor includes the polycrystalline silicon layer, and an organic light emitting device includes the thin film transistor.

Abstract: A substrate processing apparatus that simultaneously forms thin films on a plurality of substrates and performs heat treatment includes: a plurality of substrate holders, each including a substrate support that supports a substrate and a first gas pipe having one or a plurality of injection holes; a boat where the plurality of substrate holders are stacked and including a second gas pipe connected with the first gas pipe of each of the substrate holders; a process chamber providing a space in which the substrates stacked in the boat are processed; a conveying unit that carries the boat into/out of the process chamber; a first heating unit disposed outside the process chamber; and a gas supply unit including a third gas pipe connected with the second gas pipe and supplying a heated or cooled gas into the second gas pipe.

Abstract: A canister for a deposition apparatus and a deposition apparatus using the same, and more particularly, a canister for a deposition apparatus that can provide a uniform amount of source material contained in a reaction gas supplied into a deposition chamber and improve safety in the supply of the source material, and a deposition apparatus using the canister. The deposition apparatus includes a deposition chamber; a canister supplying a reaction gas into the deposition chamber; and a carrier gas supplier for supplying a carrier gas into the canister, in which the canister includes a main body, a heating unit heating the main body and a temperature measuring unit disposed under the main body.

Abstract: A method of crystallizing a silicon layer and a method of manufacturing a TFT, the method of crystallizing a silicon layer including forming a catalyst metal layer on a substrate; forming a catalyst metal capping pattern on the catalyst metal layer; forming a second amorphous silicon layer on the catalyst metal capping pattern; and heat-treating the second amorphous silicon layer to form a polycrystalline silicon layer.

Abstract: A method of crystallizing an amorphous silicon layer, a method of manufacturing a thin film transistor using the same, and a thin film transistor using the manufacturing method, the crystallizing method including: forming an amorphous silicon layer; positioning crystallization catalyst particles on the amorphous silicon layer to be separated from each other; selectively removing the crystallization catalyst particles from a portion of the amorphous silicon layer; and crystallizing the amorphous silicon layer by a heat treatment.

Abstract: A thin film transistor including a first polycrystalline semiconductor layer disposed on a substrate, a second polycrystalline semiconductor layer disposed on the first polycrystalline semiconductor layer, and metal catalysts configured to adjoin the first polycrystalline semiconductor layer and spaced apart from one another at specific intervals.

Abstract: A substrate including a thin film transistor, the substrate including an active layer disposed on the substrate, the active layer including a channel area and source and drain areas, a gate electrode disposed on the active layer, the channel area corresponding to the gate electrode, a gate insulating layer interposed between the active layer and the gate electrode, an interlayer insulating layer disposed to cover the active layer and the gate electrode, the interlayer insulating layer having first and second contact holes partially exposing the active layer, source and drain electrodes disposed on the interlayer insulating layer, the source and drain areas corresponding to the source and drain electrodes, and ohmic contact layers, the ohmic contact layers being interposed between the interlayer insulating layer and the source and drain electrodes, and contacting the source and drain areas through the first and second contact holes.

Abstract: A thin film transistor including: an active layer formed on a substrate; a gate insulating layer pattern formed on a predetermined region of the active layer; a gate electrode formed on a predetermined region of the gate insulating layer pattern; an etching preventing layer pattern covering the gate insulating layer pattern and the gate electrode; and a source member and a drain member formed on the active layer and the etching preventing layer pattern.

Abstract: A display device including: a substrate; a first semiconductor layer disposed on the substrate; a second semiconductor layer disposed on the substrate and adjacent to the first semiconductor layer; a first insulation layer disposed on both the first semiconductor layer and the second semiconductor layer, the first insulation layer including a first opening forming a space between the first semiconductor layer and the second semiconductor layer; and a second insulation layer disposed on the first insulation layer and that fills the first opening.

Abstract: A thin film transistor (TFT) includes a substrate, and an active region on the substrate including source and drain regions at opposing ends of the active region, a lightly doped region adjacent to at least one of the source region and the drain region, a plurality of channel regions, and a highly doped region between two channel regions of the plurality of channel regions. The TFT includes a gate insulation layer on the active region, and a multiple gate electrode having a plurality of gate electrodes on the gate insulation layer, the plurality of channel regions being disposed below corresponding gate electrodes, and the source region and the drain region being disposed adjacent to outermost portions of the multiple gate electrode. The TFT includes a first interlayer insulation layer on the multiple gate electrode, and source and drain electrodes extending through the first interlayer insulation layer and contacting the respective source and drain regions.