Abstract: Proposed is a space monitoring apparatus using a sound signal and a space monitoring method thereof and, more specifically, is a technology in which a space monitoring apparatus using a sound to determine a spatial condition sets a synthesized sound having a plurality of frequency components to utilize the performance of a speaker efficiently and emits the synthesized sound to monitor the spatial condition.

Abstract: A method of automatically setting an acoustic signal of a device for space monitoring by using the acoustic signal is proposed. The proposed is a technology for automatically setting the acoustic signal emitted from the device for space monitoring by using the acoustic signal for more precise measurement.

Abstract: Proposed is a space monitoring apparatus using a sound signal and a space monitoring method thereof and, more specifically, is a technology in which a space monitoring apparatus using a sound to determine a spatial condition sets a synthesized sound having a plurality of frequency components to utilize the performance of a speaker efficiently and emits the synthesized sound to monitor the spatial condition.

Abstract: Proposed is a noise avoiding method for a space monitoring apparatus using a sound signal and, more specifically, is a technology that allows the space monitoring apparatus, which uses a sound signal to monitor a spatial condition, to avoid noise in a space to be monitored to correctly determine the spatial condition.

Abstract: Proposed is a noise avoiding method for a space monitoring apparatus using a sound signal and, more specifically, is a technology that allows the space monitoring apparatus, which uses a sound signal to monitor a spatial condition, to avoid noise in a space to be monitored to correctly determine the spatial condition.

Abstract: A method of automatically setting an acoustic signal of a device for space monitoring by using the acoustic signal is proposed. The proposed is a technology for automatically setting the acoustic signal emitted from the device for space monitoring by using the acoustic signal for more precise measurement.

Abstract: The present disclosure relates to an apparatus and method for monitoring a space using a three-dimensional acoustic web, and to a method of emitting a plurality of acoustic signals, forming a three-dimensional acoustic web in a monitoring target space based on interference between acoustic waves, and recognizing a situation of the monitoring target space based on a change in measured acoustic signals.

Abstract: The present disclosure relates to an apparatus and method for monitoring a space using a three-dimensional acoustic web, and to a method of emitting a plurality of acoustic signals, forming a three-dimensional acoustic web in a monitoring target space based on interference between acoustic waves, and recognizing a situation of the monitoring target space based on a change in measured acoustic signals.

Abstract: The present invention discloses an apparatus and a method for diagnosing abnormal conditions, that quantitatively considers acquisition difficulties between abnormal symptoms provided on a computer screen and quantifies acquisition difficulties of the abnormal symptoms through distinctiveness of measuring devices to exactly diagnose the abnormal conditions even under an improved control environment, making it possible for a user to rapidly and easily diagnose the abnormal conditions that may be generated from a complicated device. With the present invention, the abnormal conditions are diagnosed using the sequential diagnosis technique and the Boolean logic between the abnormal symptoms, making it possible to effectively diagnose the abnormal conditions even under masking effects that may be generated between the abnormal symptoms.

Abstract: The present invention discloses an apparatus and a method for diagnosing abnormal conditions, that quantitatively considers acquisition difficulties between abnormal symptoms provided on a computer screen and quantifies acquisition difficulties of the abnormal symptoms through distinctiveness of measuring devices to exactly diagnose the abnormal conditions even under an improved control environment, making it possible for a user to rapidly and easily diagnose the abnormal conditions that may be generated from a complicated device. With the present invention, the abnormal conditions are diagnosed using the sequential diagnosis technique and the Boolean logic between the abnormal symptoms, making it possible to effectively diagnose the abnormal conditions even under masking effects that may be generated between the abnormal symptoms.

Abstract: Disclosed is a ferroelectric memory device, which prevents a potential difference across a ferroelectric capacitor from being occurred and minimizes a step to be induced during the fabrication of the capacitor. The memory device comprises a first switching transistor having its gate coupled to a positive wordline, and its source and drain coupled between a bitline and a first node respectively; a ferroelectric capacitor coupled between the first node and a plateline; and a second switching transistor having its gate coupled to a negative wordline, and its source and drain coupled to the first node and the plateline respectively. A second node at which the source of the second switching transistor and the plateline are contacted is formed on an active area locating between two adjacent negative wordlines; and the ferroelectric capacitor is formed on the active area. The active area is broadly formed to prevent a resistance of the second node from being occurred.

Abstract: An elevator type parking system is disclosed. The system includes a main frame having a plurality of vertical columns and horizontal columns for forming a hoist way in a center portion thereof a plurality of parking rooms at both sides of the hoist way, a lift movable along the hoist way formed in the main frame, a lift lifting and lowering drive unit for lifting and lowering the lift, a parking unit installed in each floor of the parking room and being horizontally movable, a parking unit actuating unit installed on the lift for horizontally pulling the parking unit from the parking room to the hoist way and pushing the same from the hoist way to the parking room, a driven unit fixed to the parking unit and driven by the parking means actuating unit for thereby horizontally moving the parking unit.

Abstract: Disclosed is a ferroelectric memory device, which prevents a potential difference across a ferroelectric capacitor from being occurred and minimizes a step to be induced during the fabrication of the capacitor. The memory device comprises a first switching transistor having its gate coupled to a positive wordline, and its source and drain coupled between a bitline and a first node respectively; a ferroelectric capacitor coupled between the first node and a plateline; and a second switching transistor having its gate coupled to a negative wordline, and its source and drain coupled to the first node and the plateline respectively. A second node at which the source of the second switching transistor and the plateline are contacted is formed on an active area locating between two adjacent negative wordlines; and the ferroelectric capacitor is formed on the active area. The active area is broadly formed to prevent a resistance of the second node from being occurred.

Abstract: The present invention provides an improved ferroelectric capacitor used in a memory device by providing reliable electric interconnection between a lower electrode of the capacitor and an active region of transistor, and to provide a method for fabricating the same. A semiconductor capacitor according to the present invention comprises: a first conducting film filling an opening which is formed in an interlayer insulating film, being in contact with an active region of a semiconductor; a stacked charge storage node including a second conducting film formed on the first conducting film and an interlaying insulating film, a first diffusion preventing film formed on the second conducting film, a lower electrode film formed on the first diffusion preventing film, and a ferroelectric film formed on the lower electrode film; and a conducting spacer film formed on sidewalls of the lower electrode film, the first diffusion preventing film and the second conducting film.

Abstract: A method of manufacturing a CMOS device which can prevent latch-up and easily apply to high integration device by completely isolating a N well and a P well in the back side of a substrate, is disclosed. A method of manufacturing a CMOS device according to the present invention, includes the steps of: providing a semiconductor having a back side and a front side, and including a N well and a P well formed therein respectively, a NMOS transistor formed on the P well, a PMOS transistor formed on the N well; etching the back side of the substrate along the PN junction portions of the N well and the P well to the front side of the substrate, thereby forming trenches; and, forming an insulating layer on the back side of the substrate to fill the trenches, thereby isolating the P well and the N well.

Abstract: A ferroelectric memory device includes memory cells consisted of a switching transistor and a ferroelectric capacitor for storing electric charges, word lines for enabling the switching transistor, positive and negative bit lines for transferring the electric charges, a sense amplifier for sensing a voltage difference between the positive and the negative bit lines and for amplifying the voltage levels of the positive and the negative bit lines. Positively pumped voltage is applied to the positive bit line while positive voltage lower than the positively pumped supply voltage is applied to the negative bit line. With the higher positive bit line, a sensing margin of the sense amplifier is improved and no separate reference cell is required for the sensing the voltage difference. Method for operating for the ferroelectric memory device is also disclosed.

Abstract: A semiconductor memory device, includes: a single bit line; at least one memory cell coupled to said single bit line for storing a first charge corresponding to predetermined data; a reference voltage generation circuit for generating a reference voltage as a first voltage; a charge pump circuit for generating a second charge substantially corresponding to the reference voltage; a transistor for combining the first charge with the second charge at a read operation, thereby generating a second voltage; and a sense amplifier coupled to said single bit line for sensing and amplifying a difference between the first voltage and the second voltage, to thereby read out the predetermined data. The semiconductor memory device can reduce its chip size by employing the single bit line coupled to at least one memory cell and effectively sense and amplify the difference between the first voltage from the reference voltage generation circuit and the second voltage from the single bit line at the read operation.

Abstract: A ferroelectric memory device includes a plurality of groups of active areas, each active area having two memory cells, and a plurality of pairs of conductive lines arranged in a parallel fashion, each conductive line having a word line and a plate line, wherein a pair of the word line and the plate line are isolated through an insulating layer, wherein each group of the active areas are coupled to each pair of the conductive lines, thereby having a folded bit line architecture without increasing a chip size.

Abstract: An apparatus for driving a cell plate line of a semiconductor memory device having a plurality of memory cells, includes: a first driving means for driving the cell plate line with a first power supply voltage; a second driving means for driving the cell plate line with a second power supply voltage higher than the first power supply voltage; and a driving control means for enabling said second driving means for a predetermined time in order to activate the cell plate line in response to a control signal from an external circuit and enabling said first driving means after the predetermined time in order to stabilize said second driving means enables, wherein the control signal is employed to select one memory cell related to the cell plate line. Thereby, the apparatus can the high-speed operation of a ferroelectric random access memory (FeRAM) by using two power supply voltage sources.

Abstract: The present invention relates to semiconductor memory device and more particularly, to a technique for stabilizing the potential of the cell plate line by using two kinds of potentials for the cell plate line driver to implement the powerful driving force and rapid operability required in case of designing the RAM using as the memory device the material having large electrostatic capacity, and for preventing the loss of I/O by using CMOS transistors in the decoder circuit which receives the cell plate line voltage by cooperating with the cell plate line driver circuit and feeds back the cell plate line voltage.