Patents by Inventor Jae Won Jeong
Jae Won Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12261174Abstract: A transistor device includes a substrate, a source region provided on the substrate, a drain region spaced apart from the source region in a direction parallel to a top surface of the substrate, a pair of constant current generating patterns provided in the substrate to be adjacent to the source region and the drain region, respectively, a gate electrode provided on the substrate and between the source region and the drain region, and a gate insulating film interposed between the gate electrode and the substrate, wherein, the pair of constant current generating patterns generate a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: GrantFiled: December 16, 2019Date of Patent: March 25, 2025Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim
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Patent number: 12259358Abstract: The present invention relates to an eddy current sensor for detecting a crack in a battery cell, and a system for detecting a crack of a battery cell including the eddy current sensor. According to the present invention, it is possible to easily detect a crack generated in an electrode, an electrode tab or a welded portion.Type: GrantFiled: October 27, 2021Date of Patent: March 25, 2025Assignee: LG ENERGY SOLUTION, LTD.Inventors: Ji Won Park, Kwang Hyun Kim, Yeon Hyuk Heo, Jae Won Jeong, Eun Gu Han, Min Su Hwang, Myung Han Lee
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Publication number: 20250089186Abstract: The present disclosure relates to a display device, and more particularly, to a display device that can prevent distortion of driving members. A display device includes: a display panel; a first main guide rail and a second main guide rail disposed on a first side and a second side of the display panel, respectively; and a first driving member disposed between the first main guide rail and the second main guide rail. The first driving member is selectively coupled to the first main guide rail from among the first main guide rail and the second main guide rail and is not coupled to the second main guide rail.Type: ApplicationFiled: May 6, 2024Publication date: March 13, 2025Inventors: Jae Won JEONG, Jong Hyuck KIM, Ju Yeop SEONG, Hee Kwon LEE, Jae Soo JANG
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Patent number: 12249605Abstract: Provided are an inverter including a first source and drain, an interlayer insulating film on the first source, a second source on the interlayer insulating film, a second drain on the first drain, a first channel between the first source and drain, a second channel over the first channel between the second source and drain, a gate insulating film covering outer surfaces of the first and second channel, a part of a surface of the first source in the direction to the first drain, a part of a surface of the second source in the direction to the second drain, a part of a surface of the first drain in the direction to the first source, and a part of a surface of the second drain in the direction to the second source, and a gate electrode between the first source and drain and between the second source and drain.Type: GrantFiled: February 16, 2022Date of Patent: March 11, 2025Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Youngeun Choi, Wooseok Kim
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Publication number: 20250076927Abstract: A display device includes a display panel including a display area for displaying an image and a sub-area extending in one direction from the display area, where the sub-area includes a bending area bent in a rear direction of the display area, and an outer portion extending from the bending area to overlap the display area, a display driving circuit disposed on the outer portion of the sub-area to drive pixels of the display area, a bending protection member disposed to cover the bending area of the sub-area, a rear surface cover disposed on a rear surface of the display panel to cover the outer portion of the sub-area, and the display driving circuit, and an adhesive tape covering an end of the rear surface cover adjacent to the bending area.Type: ApplicationFiled: May 13, 2024Publication date: March 6, 2025Inventors: Jae Won JEONG, Jong Hyuck KIM, Cheol Yeong PARK, Ju Yeop SEONG, Hee Kwon LEE, Jae Soo JANG
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Publication number: 20250081564Abstract: Provided is a transistor including: a constant current formation layer; a channel layer provided on the constant current formation layer; a pair of source/drain regions spaced apart from each other, with the channel layer therebetween on the constant current formation layer; a gate electrode provided on the channel layer; and a gate ferroelectric film provided between the gate electrode and the channel layer.Type: ApplicationFiled: November 19, 2024Publication date: March 6, 2025Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Ji Won Chang, Jae Won Jeong, Youngeun Choi, Wooseok Kim
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Publication number: 20250061940Abstract: In a memory device including a ternary memory cell, the ternary memory cell may include: a first inverter and a second inverter cross-coupled in a first node and a second node and including a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off; a first read transistor and a first write transistor which are connected to each other in parallel between the first node and a first bit line; and a second read transistor and a second write transistor which are connected to each other in parallel between the second node and a second bit line, wherein the first read transistor and the second read transistor may have a read access current, which is less than or equal to the constant current, pass therethrough in response to an activated read word line.Type: ApplicationFiled: November 4, 2024Publication date: February 20, 2025Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi
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Publication number: 20250031320Abstract: A display device includes: a display panel including first and second surfaces, which are opposite to each other, an elastic member disposed on the first surface, a first rigid member disposed on the elastic member, and a panel support member disposed on the second surface, wherein the first rigid member includes at least one of polyethylene terephthalate (PET), polyimide, and ultra-thin glass (UTG), and the elastic member includes at least one of a dilatant, polyether block amide (PEBA), and thermoplastic polyurethane (TPU).Type: ApplicationFiled: February 17, 2024Publication date: January 23, 2025Inventors: Ju Yeop SEONG, Jong Hyuck KIM, Man Sik MYUNG, Sung June PARK, Hee Kwon LEE, Jae Soo JANG, Jae Won JEONG, Sung Chul CHOI
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Publication number: 20250002859Abstract: The present invention relates to a method for producing cultured meat by utilizing a fetal bovine serum (FBS) substitute derived from butchery by-products and, more specifically, to: a method for preparing a medium additive (an FBS substitute) for culturing cultured meat prepared by the method; a medium composition for culturing cultured meat comprising the additive; and a method for preparing cultured meat by using same. By using the medium additive (the FBS substitute) for culturing cultured meat prepared by the unique method of the present invention, the traditional fetal bovine serum (FBS), which has a high unit cost and the ethical issue of having to be collected from live calves, is completely substituted or jointly used, and thus the amount of fetal bovine serum (FBS) use can be reduced and the product efficiency of the cultured meat can be enhanced.Type: ApplicationFiled: October 28, 2022Publication date: January 2, 2025Inventors: Sun Jin HUR, Da Young LEE, Seung Yun LEE, Jae Won JEONG, Jae Hyeon KIM, Hyun Woo KIM
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Patent number: 12165699Abstract: In a memory device including a ternary memory cell, the ternary memory cell may include: a first inverter and a second inverter cross-coupled in a first node and a second node and including a pull-up device and a pull-down device configured to have a constant current pass therethrough upon turn-off; a first read transistor and a first write transistor which are connected to each other in parallel between the first node and a first bit line; and a second read transistor and a second write transistor which are connected to each other in parallel between the second node and a second bit line, wherein the first read transistor and the second read transistor may have a read access current, which is less than or equal to the constant current, pass therethrough in response to an activated read word line.Type: GrantFiled: April 3, 2020Date of Patent: December 10, 2024Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi
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Patent number: 12154950Abstract: Provided is a transistor including: a constant current formation layer; a channel layer provided on the constant current formation layer; a pair of source/drain regions spaced apart from each other, with the channel layer therebetween on the constant current formation layer; a gate electrode provided on the channel layer; and a gate ferroelectric film provided between the gate electrode and the channel layer.Type: GrantFiled: November 19, 2020Date of Patent: November 26, 2024Assignee: UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Ji Won Chang, Jae Won Jeong, Youngeun Choi, Wooseok Kim
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Publication number: 20240379786Abstract: A transistor includes a substrate; a pair of constant current forming regions provided in the substrate; a pair of source/drain regions respectively provided on the pair of constant current forming regions in the substrate; and a gate structure provided between the pair of source/drain regions, wherein any one of the constant current forming regions immediately adjacent to any one of the pair of source/drain regions serving as a drain forms a constant current between the any one of the pair of source/drain region serving as the drain and the any one of the constant current forming regions.Type: ApplicationFiled: July 22, 2024Publication date: November 14, 2024Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Ji Won Chang, Jae Won Jeong, Youngeun Choi, Wooseok Kim
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Patent number: 12068381Abstract: A transistor includes a substrate; a pair of constant current forming regions provided in the substrate; a pair of source/drain regions respectively provided on the pair of constant current forming regions in the substrate; and a gate structure provided between the pair of source/drain regions, wherein any one of the constant current forming regions immediately adjacent to any one of the pair of source/drain regions serving as a drain forms a constant current between the any one of the pair of source/drain region serving as the drain and the any one of the constant current forming regions.Type: GrantFiled: November 19, 2020Date of Patent: August 20, 2024Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Ji Won Chang, Jae Won Jeong, Youngeun Choi, Wooseok Kim
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Patent number: 12009393Abstract: A tunnel field effect transistor includes a constant current formation layer, a source region and a drain region provided on the constant current formation layer, a channel layer provided between the source region and the drain region, a gate electrode provided on the channel layer, and a gate insulating film provided between the gate electrode and the channel layer, wherein the source region and the drain region have different conductivity types, and the constant current formation layer forms a constant current between the drain region and the constant current formation layer.Type: GrantFiled: November 19, 2020Date of Patent: June 11, 2024Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Ji Won Chang, Jae Won Jeong, Youngeun Choi, Wooseok Kim
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Publication number: 20240162230Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: ApplicationFiled: January 12, 2024Publication date: May 16, 2024Applicant: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim, Jiwon Chang
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Patent number: 11923846Abstract: A ternary logic circuit includes: a first inverter unit; a second inverter unit arranged in parallel with the first inverter unit; a first junction unit arranged between the first inverter unit and an output terminal and including a tunnel PN junction; and a second junction unit arranged between the second inverter unit and the output terminal and including a tunnel PN junction, wherein, when an absolute value of an input voltage applied to an input terminal is less than a first input voltage, the output terminal outputs a first output voltage, and when the absolute value of the input voltage is greater than the first input voltage and less than a second input voltage, the output terminal outputs a second output voltage, and when the absolute value of the input terminal is greater than the second input voltage, the output terminal outputs a third output voltage.Type: GrantFiled: February 16, 2022Date of Patent: March 5, 2024Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Youngeun Choi, Wooseok Kim, Jae Hyeon Jun
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Patent number: 11908863Abstract: A transistor device includes a substrate, a fin structure extending on the substrate in a direction parallel to a top surface of the substrate, a source region and a drain region provided at an upper portion of the fin structure, a constant current generating layer provided at a lower portion of the fin structure, a gate insulating film provided on both side surfaces and a top surface of the upper portion of the fin structure, and a gate electrode provided on the gate insulating film, wherein the gate electrode is provided on the fin structure and between the source region and the drain region, the constant current generating layer generates a constant current between the drain region and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.Type: GrantFiled: December 16, 2019Date of Patent: February 20, 2024Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi, Woo Seok Kim, Jiwon Chang
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Patent number: 11801729Abstract: Disclosed is an air conditioning apparatus for a vehicle, the air conditioning apparatus being applicable to an autonomous vehicle, etc. having console removed therefrom by ensuring a lower space of a driver's seat in a front part of the vehicle and being capable of preventing condensate water from flowing backward. The air conditioning apparatus for a vehicle comprises: an air conditioning case having an air flow path formed therein and a plurality of air discharge ports; and a cooling heat exchanger and a heating heat exchanger provided in the air flow path of the air conditioning case and exchanging heat with the air passing through the air flow path, wherein the air discharge ports include a front seat air discharge port and a back seat air discharge port, and the back seat air discharge port is arranged under the heating heat exchanger in the direction of gravity.Type: GrantFiled: November 4, 2020Date of Patent: October 31, 2023Assignee: HANON SYSTEMSInventors: Yong Ho Kim, Hak Kyu Kim, Seung Kyu Oh, Jae Won Jeong
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Patent number: 11727988Abstract: According to an embodiment of the present disclosure, a memory device for a logic-in-memory may include a cell array including a plurality of ternary memory cells, a row decoder configured to select at least one ternary memory cell from among the plurality of ternary memory cells, and a page buffer configured to provide a first value to the at least one ternary memory cell and latch a third value obtained by performing a logic operation on the first value and a second value stored in the at least one ternary memory cell and/or the second value.Type: GrantFiled: April 3, 2020Date of Patent: August 15, 2023Assignee: UNIST(ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)Inventors: Kyung Rok Kim, Jae Won Jeong, Young Eun Choi
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Patent number: 11655235Abstract: The present technology provides pyrrolidine and piperidine compounds or pharmaceutically acceptable salts thereof, preparation processes thereof, pharmaceutical compositions comprising the same, and uses thereof. In particular, said compounds may be usefully applied in the treatment and prevention of FAP-mediated diseases.Type: GrantFiled: November 5, 2020Date of Patent: May 23, 2023Assignee: YUHAN CORPORATIONInventors: Tae Han Dong, Yoo Hoi Park, Tae Kyun Kim, Jae Eun Joo, Eun Hye Jung, Jae Won Jeong, Hyun Seung Lee, Do Hoon Kim, Ji Eun Yang, Jun Chui Park, Sang Myoun Lim, Na Ry Ha, Da In Chung, Ji Yeong Gal