Abstract: Disclosed are methods and apparatuses for creating a prototype, the methods includes at least: receiving, by a prototyping terminal, inputs of setting a trigger of a prototype and a response of an external terminal according to the trigger, generating, by the prototyping terminal, a prototype based on the inputs of setting, receiving, by an execution terminal, the generated prototype, sensing, by the execution terminal, the trigger on the received prototype, generating, by the execution terminal, a control command corresponding to the sensed trigger according to the sensing of the trigger, and transmitting, by the execution terminal, the generated control command to the external terminal, wherein the control command comprises a command for enabling the external terminal to output a preset response in response to the control command.

Abstract: Disclosed are methods and systems for prototyping graphic user interface, the methods includes at least: receiving, by a prototyping terminal, a first chain reaction rule through a prototyping interface, sensing, by a prototype execution terminal, a change in a value of a reference attribute of a trigger object within a trigger range of the first chain reaction rule, and changing, by the prototype execution terminal, a display state of a reaction object according to a change rule of the first chain reaction rule when sensing the change in the value of the reference attribute of the trigger object.

Abstract: A thin film transistor array panel is provided as follows. A gate electrode is disposed on a substrate. A semiconductor layer is disposed on the gate electrode. A gate insulating layer is disposed between the gate electrode and the semiconductor layer. A source electrode is disposed on a first side of the semiconductor layer, having a first lateral surface. A drain electrode is disposed on a second side of the semiconductor layer, having a second lateral surface. The first and second lateral surfaces define a spacing which overlaps the gate electrode. A metal suicide layer is disposed on the first and second lateral surfaces. A passivation layer is disposed on the metal silicide layer, the source electrode and the drain electrode. The passivation layer is not in contact with the first and second lateral surfaces.

Abstract: A thin film transistor array panel is provided as follows. A gate electrode is disposed on a substrate. A semiconductor layer is disposed on the gate electrode. A gate insulating layer is disposed between the gate electrode and the semiconductor layer. A source electrode is disposed on a first side of the semiconductor layer, having a first lateral surface. A drain electrode is disposed on a second side of the semiconductor layer, having a second lateral surface. The first and second lateral surfaces define a spacing which overlaps the gate electrode. A metal silicide layer is disposed on the first and second lateral surfaces. A passivation layer is disposed on the metal silicide layer, the source electrode and the drain electrode. The passivation layer is not in contact with the first and second lateral surfaces.

Abstract: A thin film transistor includes a gate electrode disposed on a substrate, a gate insulating layer disposed on the gate electrode and the substrate, an oxide semiconductor pattern disposed on the gate insulating layer, wherein a part of the oxide semiconductor overlaps the gate electrode, a source electrode disposed on a part of the oxide semiconductor pattern, and a drain electrode disposed on a part of the oxide semiconductor pattern spaced apart from the source electrode, wherein a thickness of the gate insulating layer in a channel region, the channel region overlapping the gate electrode, is thinner than a thickness of the gate insulating layer in a remaining region, the remaining region other than the channel region.

Abstract: A thin film transistor array panel is provided as follows. A gate electrode is disposed on a substrate. A semiconductor layer is disposed on the gate electrode. A gate insulating layer is disposed between the gate electrode and the semiconductor layer. A source electrode is disposed on a first side of the semiconductor layer, having a first lateral surface. A drain electrode is disposed on a second side of the semiconductor layer, having a second lateral surface. The first and second lateral surfaces define a spacing which overlaps the gate electrode. A metal silicide layer is disposed on the first and second lateral surfaces. A passivation layer is disposed on the metal silicide layer, the source electrode and the drain electrode. The passivation layer is not in contact with the first and second lateral surfaces.

Abstract: A thin film transistor array panel includes an insulating substrate, a gate line disposed on the insulating substrate having a gate electrode, a first gate insulating layer disposed on the gate line and made of silicon nitride, a second gate insulating layer disposed on the first gate insulating layer and made of silicon oxide, an oxide semiconductor disposed on the second gate insulating layer, a data line disposed on the oxide semiconductor and having a source electrode, a drain electrode disposed on the oxide semiconductor and facing the source electrode, and a pixel electrode that is connected to the drain electrode. A thickness of the second gate insulating layer may range from 200 ? to less than 500 ?.

Abstract: A thin-film transistor (TFT) includes a gate electrode, an oxide semiconductor pattern, a source electrode, a drain electrode and an etch stopper. The gate electrode is formed on a substrate. The oxide semiconductor pattern is disposed in an area overlapping with the gate electrode. The source electrode is partially disposed on the oxide semiconductor pattern. The drain electrode is spaced apart from the source electrode, faces the source electrode, and is partially disposed on the oxide semiconductor pattern. The etch stopper has first and second end portions. The first end portion is disposed between the oxide semiconductor pattern and the source electrode, and the second end portion is disposed between the oxide semiconductor pattern and the drain electrode. A sum of first and second overlapping length is between about 30% and about 99% of a total length of the etch stopper.

Abstract: The invention discloses a reflective micro-optic interferometric filter system, comprising a dual fiber collimator for expanding and outputting a beam, introduced from an input fiber, through a lens unit, collimating the beam through the lens unit, and outputting the collimated beam through an output fiber; an optical mirror for reflecting the expanded beam, outputted through the lens unit of the dual fiber collimator, and directing the reflected beam into the output fiber; and an optical plate positioned between the dual fiber collimator and the optical mirror, and having a refractive index modulation or a periodic pattern for inducing optical phase differences depending on the beam propagation path.

Abstract: Disclosed is a wavelength division multiplexing passive optical network (WDM PON) system in which an optical signal outputted from a central office is injected into a Fabry-Perot laser diode (F-P LD) as the light source of an optical network unit, so that the output wavelength of the optical network unit is injection-locked at the same wavelength as that of the optical signal outputted from the central office, thereby enabling the optical network unit to output an optical signal having the same wavelength as that of the optical signal outputted from the central office. In accordance with this system, it is possible to transmit and receive forward and backward data at the same wavelength by the unit of channels. Since inexpensive F-P LDs are used as respective light sources of the central office and optical network units, it is possible to efficiently and economically implement a WDM PON system.

Abstract: Disclosed is a wavelength division multiplexing passive optical network (WDM PON) system in which an optical signal outputted from a central office is injected into a Fabry-Perot laser diode (F-P LD) as the light source of an optical network unit, so that the output wavelength of the optical network unit is injection-locked at the same wavelength as that of the optical signal outputted from the central office, thereby enabling the optical network unit to output an optical signal having the same wavelength as that of the optical signal outputted from the central office. In accordance with this system, it is possible to transmit and receive forward and backward data at the same wavelength by the unit of channels. Since inexpensive F-P LDs are used as respective light sources of the central office and optical network units, it is possible to efficiently and economically implement a WDM PON system.

Abstract: Disclosed is a wavelength division multiplexing passive optical network (WDM PON) system in which an optical signal outputted from a central office is injected into a Fabry-Perot laser diode (F-P LD) as the light source of an optical network unit, so that the output wavelength of the optical network unit is injection-locked at the same wavelength as that of the optical signal outputted from the central office, thereby enabling the optical network unit to output an optical signal having the same wavelength as that of the optical signal outputted from the central office. In accordance with this system, it is possible to transmit and receive forward and backward data at the same wavelength by the unit of channels. Since inexpensive F-P LDs are used as respective light sources of the central office and optical network units, it is possible to efficiently and economically implement a WDM PON system.

Abstract: Disclosed is a dense wavelength division multiplexing-passive optical network (DWDM-PON) system utilizing self-injection locking of Fabry-Perot laser diodes, in which output optical signals of different wavelengths are partially fed back by a partial mirror, so as to injection-lock the Fabry-Perot laser diodes, respectively. In accordance with this system, inexpensive Fabry-Perot laser diodes can be used as respective light sources of a central office and optical network units (ONUs). Accordingly, it is possible to minimize the system construction costs, as compared to conventional optical networks.

Abstract: Disclosed is a dense wavelength division multiplexing-passive optical network (DWDM-PON) system utilizing self-injection locking of Fabry-Perot laser diodes, in which output optical signals of different wavelengths are partially fed back by a partial mirror, so as to injection-lock the Fabry-Perot laser diodes, respectively. In accordance with this system, inexpensive Fabry-Perot laser diodes can be used as respective light sources of a central office and optical network units (ONUs). Accordingly, it is possible to minimize the system construction costs, as compared to conventional optical networks.

Abstract: Disclosed is a wavelength division multiplexing passive optical network (WDM PON) system in which an optical signal outputted from a central office is injected into a Fabry-Perot laser diode (F-P LD) as the light source of an optical network unit, so that the output wavelength of the optical network unit is injection-locked at the same wavelength as that of the optical signal outputted from the central office, thereby enabling the optical network unit to output an optical signal having the same wavelength as that of the optical signal outputted from the central office. In accordance with this system, it is possible to transmit and receive forward and backward data at the same wavelength by the unit of channels. Since inexpensive F-P LDs are used as respective light sources of the central office and optical network units, it is possible to efficiently and economically implement a WDM PON system.