Patents by Inventor Jae-Won Um

Jae-Won Um has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7553726
    Abstract: A method of fabricating nonvolatile memory devices may involve forming separate floating gates on a semiconductor substrate, forming control gates on the semiconductor substrate, conformally forming a buffer film on a surface of the semiconductor substrate, injecting ions into the semiconductor substrate between the pairs of the floating gates to form a common source region partially overlapping each floating gate of the respective pair of the floating gates, depositing an insulating film on the buffer film, etching the buffer film and the insulating film at side walls of the floating gates and the control gates to form spacers at the side walls of the floating gates and the control gates, and forming a drain region in the semiconductor substrate at a side of the control gate other than a side of the control gate where the common source region is formed.
    Type: Grant
    Filed: August 17, 2006
    Date of Patent: June 30, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-gu Yoon, Chul-soon Kwon, Jae-won Um, Jung-ho Moon
  • Publication number: 20070181935
    Abstract: There are provided a method of fabricating a flash memory device and a flash memory device fabricated thereby. The method of fabricating a flash memory device includes forming an isolation layer defining an active region in a semiconductor substrate, wherein the isolation layer is formed to have a protrusion being higher than a top surface of the active region, and to provide a groove in the active region. A conductive layer pattern is formed in the groove. A buffer layer is formed on the semiconductor substrate having the conductive layer pattern. Then, an oxidation barrier layer pattern having a line shape opening across the active region is formed on the buffer layer. The buffer layer and an upper portion of the conductive layer pattern, which are exposed by the opening, are selectively oxidized to form a mask oxide layer at a cross region of the opening and the active region, and simultaneously to form a buffer oxide layer on the isolation layer adjacent to the mask oxide layer.
    Type: Application
    Filed: March 28, 2007
    Publication date: August 9, 2007
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Wook Hyun, Jae-Won Um
  • Patent number: 7211485
    Abstract: There are provided a method of fabricating a flash memory device and a flash memory device fabricated thereby. The method of fabricating a flash memory device includes forming an isolation layer defining an active region in a semiconductor substrate, wherein the isolation layer is formed to have a protrusion being higher than a top surface of the active region, and to provide a groove in the active region. A conductive layer pattern is formed in the groove. A buffer layer is formed on the semiconductor substrate having the conductive layer pattern. Then, an oxidation barrier layer pattern having a line shape opening across the active region is formed on the buffer layer. The buffer layer and an upper portion of the conductive layer pattern, which are exposed by the opening, are selectively oxidized to form a mask oxide layer at a cross region of the opening and the active region, and simultaneously to form a buffer oxide layer on the isolation layer adjacent to the mask oxide layer.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: May 1, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Wook Hyun, Jae-Won Um
  • Publication number: 20070048924
    Abstract: A method of fabricating nonvolatile memory devices may involve forming separate floating gates on a semiconductor substrate, forming control gates on the semiconductor substrate, conformally forming a buffer film on a surface of the semiconductor substrate, injecting ions into the semiconductor substrate between the pairs of the floating gates to form a common source region partially overlapping each floating gate of the respective pair of the floating gates, depositing an insulating film on the buffer film, etching the buffer film and the insulating film at side walls of the floating gates and the control gates to form spacers at the side walls of the floating gates and the control gates, and forming a drain region in the semiconductor substrate at a side of the control gate other than a side of the control gate where the common source region is formed.
    Type: Application
    Filed: August 17, 2006
    Publication date: March 1, 2007
    Inventors: In-gu Yoon, Chul-soon Kwon, Jae-won Um, Jung-ho Moon
  • Publication number: 20050124117
    Abstract: There are provided a method of fabricating a flash memory device and a flash memory device fabricated thereby. The method of fabricating a flash memory device includes forming an isolation layer defining an active region in a semiconductor substrate, wherein the isolation layer is formed to have a protrusion being higher than a top surface of the active region, and to provide a groove in the active region. A conductive layer pattern is formed in the groove. A buffer layer is formed on the semiconductor substrate having the conductive layer pattern. Then, an oxidation barrier layer pattern having a line shape opening across the active region is formed on the buffer layer. The buffer layer and an upper portion of the conductive layer pattern, which are exposed by the opening, are selectively oxidized to form a mask oxide layer at a cross region of the opening and the active region, and simultaneously to form a buffer oxide layer on the isolation layer adjacent to the mask oxide layer.
    Type: Application
    Filed: October 4, 2004
    Publication date: June 9, 2005
    Inventors: Kwang-Wook Hyun, Jae-Won Um