Patents by Inventor Jae Wook Seok

Jae Wook Seok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230186791
    Abstract: Disclosed is a real-scale landslide simulator for earthquake reproduction comprising: a base; a tower provided in one end of the base; a multi-stage simulation soil box provided movably in the vertical direction along the tower and filled with soil, which is subjected to compaction; a movable bogie provided movably in the horizontal direction on the upper surface of the base while supporting the other side of the multi-stage simulation soil box; a vertical reciprocator that reciprocates the multi-stage simulation soil box in the vertical direction; and a horizontal reciprocator that reciprocates the movable bogie in the horizontal direction. It is possible to reproduce liquefaction and shear strength reduction caused by an earthquake and analyze a real-scale landslide mechanism caused by an earthquake by repeatedly providing vertical and horizontal vibrations to the soil and forming a groundwater level using the groundwater simulation device.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 15, 2023
    Inventors: Min Su JUNG, Jae Wook SEOK, Hyang Seon JEONG, Sun Gyu CHOI, Hyo Sung SONG
  • Patent number: 6853060
    Abstract: A semiconductor package has a substrate comprising a thermosetting resin layer of an approximate planar plate, a plurality of copper patterns formed at top and bottom surfaces of the resin layer, and protective layers coated on predetermined regions of the copper patterns and the thermosetting layer and having a same height at a surface of the resin layer. A semiconductor die is coupled to a center of the top surface of the substrate. A plurality of conductive wires for electrically coupling the semiconductor die to the copper patterns is positioned at the top surface of the resin layer. An encapsulant is used for covering the semiconductor die located at the top surface of the substrate and the conductive wires in order to protect them from the external environment. A plurality of solder balls is coupled to the bottom surface of the substrate.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: February 8, 2005
    Assignee: Amkor Technology, Inc.
    Inventors: Jae Wook Seok, Kyu Won Lee, Yong Suk Yoo
  • Patent number: 6822323
    Abstract: A semiconductor package has a substrate comprising a resin layer of an approximate planar plate, a die pad coupled at a top surface of a center area of the resin layer and having a printed photo imaging type protective layer thereon and a plurality of electrically conductive patterns, on which the photo imaging type protective layer and a thermosetting protective layer are printed in a consecutive order, formed at a periphery of the die pad. A semiconductor die is coupled to the photo imaging type protective layer on the die pad of the substrate by an adhesive. A plurality of conductive wires is used for electrically connecting the semiconductor die to the electrically conductive patterns. An encapsulant is used for covering the semiconductor die, the conductive wires and the surface of thermosetting protective layer on the electrically conductive patterns in order to protect them from the external environment. A plurality of contacts are coupled to the electrically conductive patterns of the substrate.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: November 23, 2004
    Assignee: Amkor Technology, Inc.
    Inventors: Byoung Jin Kim, Doo Hyun Park, Jae Wook Seok