Abstract: A pulse extending circuit includes a pulse extension inverting device for extending an input pulse signal by a predetermined width; and a delay device for extending the signal output from the pulse extension inverting device; thereby increasing a delay effect.

Abstract: An input buffer circuit of a semiconductor memory capable of controlling a logic threshold voltage of the circuit according to a change in an external supply voltage, which includes an external supply voltage detecting unit for dividing the external supply voltage into a plurality of regions by comparing a plurality of voltages, which have been divided by different ratios of the entire external supply voltage, with a standard voltage; and a converting unit including a pull-up circuit and a pull-down circuit, for converting input signals of TTL level into signals of CMOS level, according to the regions of the external supply voltage obtained by the external supply voltage detecting unit.