Patents by Inventor Jae-Woong Choi

Jae-Woong Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250143737
    Abstract: A surgical instrument includes an end tool including a first jaw and a second jaw that are rotatable, a manipulation part including an actuation manipulation part that controls actuation motions of the first jaw and the second jaw, and a power transmission part including a first jaw wire and a second jaw wire connected to the manipulation part to transfer the rotation of the manipulation part to the first jaw and the second jaw, respectively, wherein the actuation manipulation part includes an actuation pulley configured to be rotatable around an actuation rotation shaft, and a handle member that is fixedly coupled to the actuation pulley and rotated along with the actuation pulley, and a tensioner that rotates along with the rotation of the actuation pulley, and the tensioner comes into contact with the first jaw wire or the second jaw wire according to the rotation of the actuation pulley, and applies additional tension to the first jaw wire or the second jaw wire.
    Type: Application
    Filed: November 1, 2024
    Publication date: May 8, 2025
    Inventors: Dong Hoon KANG, Tae Jin PARK, Hyun JOO, Ki Woong KIM, Mi Ryoung CHOI, Jae Yeong LEE
  • Publication number: 20250126718
    Abstract: A printed circuit board includes a first substrate including a first antenna pattern; a second substrate disposed on a first substrate and including a second antenna pattern; a metal layer disposed between the first and second substrates; and a bonding layer disposed between the first and second substrates. At least one of the first and second substrates has a cavity having at least a portion disposed between the first and second antenna patterns, each of the first and second substrates includes an organic material, and the bonding layer includes an inorganic material.
    Type: Application
    Filed: June 12, 2024
    Publication date: April 17, 2025
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Ho SHIN, Jae Woong CHOI
  • Patent number: 12279364
    Abstract: The present disclosure relates to a printed circuit board. The printed circuit board includes a plurality of insulating layers each having a plurality of concave portions; a plurality of conductor pattern layers disposed in a plurality of concave portions of each of the plurality of insulating layers; first and second via holes connected to one of the plurality of concave portions independently of each other and penetrating through at least two of the plurality of insulating layers independently of each other; and first and second via conductors disposed in the first and second via holes, respectively, and connecting two of the plurality of conductor pattern layers independently of each other. An average width of the first via conductor is greater than that of the second via conductor on a cross-section.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: April 15, 2025
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Woong Choi, Jae Ho Shin
  • Patent number: 12252024
    Abstract: The present disclosure relates to an electric vehicle charging cable, in which a cooling fluid is used to efficiently cool heat generated during charging of an electric vehicle, a thermally conductive material is added as well as the cooling fluid to improve cooling performance, thereby preventing damage to inner components due to heat, safety accidents such as fire are prevented, and a diameter of the cable is minimized.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: March 18, 2025
    Assignees: LS CABLE & SYSTEM LTD., LS EV KOREA LTD.
    Inventors: Hyun Woong Kim, Jae Bok Lee, Dong Kyun Yoo, Uk Yeol Choi
  • Patent number: 12250766
    Abstract: An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; a heat dissipation structure disposed around the antenna on the upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of each of the antenna and the heat dissipation structure.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: March 11, 2025
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Woong Choi, Jin Won Lee
  • Publication number: 20250080752
    Abstract: An intra prediction mode encoding and decoding method, an image decoding device, and an image encoding device operate by deriving most probable modes (MPMs) from surrounding prediction units adjacent to a current prediction unit and deriving an intra prediction mode of the current prediction unit on the basis of an MPM flag indicating whether an MPM having the same prediction mode as the intra prediction mode of the current prediction unit exists among the derived MPMs.
    Type: Application
    Filed: November 19, 2024
    Publication date: March 6, 2025
    Applicants: Electronics and Telecommunications Research Institute, Intellectual Discovery Co., Ltd.
    Inventors: Sung Chang LIM, Hui Yong Kim, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim, Jae Gon Kim, Sang Yong Lee, Hae Chul CHOI
  • Publication number: 20250071320
    Abstract: Disclosed are a method for inducing a prediction motion vector and an apparatus using the same. An image decoding method can include: a step of determining the information related to a plurality of spatial candidate prediction motion vectors from peripheral predicted blocks of a predicted target block; and a step of determining the information related to temporal candidate prediction motion vectors on the basis of the information related to the plurality of spatial candidate prediction motion vectors. Accordingly, the present invention can reduce complexity and can enhance coding efficiency when inducing the optimum prediction motion vector.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Applicants: Electronics and Telecommunications Research Institute, Industry-University Cooperation Foundation Korea Aerospace University
    Inventors: Sung Chang LIM, Hui Yong KIM, Jin Ho LEE, Jin Soo CHOI, Jin Woong KIM, Jae Gon KIM, Sang Yong LEE, Un Ki PARK
  • Patent number: 12231635
    Abstract: The present invention relates to video encoding/decoding methods and device, wherein the video encoding method according to the invention comprises the following steps: acquiring information of peripheral blocks; setting the information about a current block based on the information of the peripheral blocks; and encoding the current block based on the set information, wherein the current block and the peripheral blocks may be a CU (coding unit).
    Type: Grant
    Filed: May 3, 2023
    Date of Patent: February 18, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung Chang Lim, Hui Yong Kim, Jin Ho Lee, Jin Soo Choi, Jin Woong Kim, Jae Gon Kim, Sang Yong Lee
  • Patent number: 12218155
    Abstract: A semiconductor device with multiple zero differential transconductance includes: a conductive substrate; a first insulating layer and a second insulating layer disposed on the conductive substrate; a first semiconductor and a second semiconductor disposed on first portions of the first insulating layer and the second insulating layer, respectively; a first buffer layer and a second buffer layer disposed on electrode contact areas of the first semiconductor and the second semiconductor, respectively; and an anode electrode and a cathode electrode disposed on second portions, which are different from the first portions, of the first insulating layer and the second insulating layer and on the first buffer layer and the second buffer layer, respectively, wherein the first semiconductor and the second semiconductor are disposed in parallel with each other and connected by the anode electrode and the cathode electrode.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: February 4, 2025
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Jin Hong Park, Jae Woong Choi, Je Jun Lee, Ju Hee Lee
  • Patent number: 12217003
    Abstract: An apparatus for processing natural language according to an embodiment includes a collection module that collects documents having tags, a parsing module that extracts text from the collected documents and extracts tag-related information on the tag surrounding each extracted text, and a preprocessing module that generates tokens of a preset unit by tokenizing each extracted text, generates token position information for each token in full text of the document, and sets the token and the token position information as training data in matching with the tag-related information.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: February 4, 2025
    Assignee: SAMSUNG SDS CO., LTD.
    Inventors: Bong-Kyu Hwang, Ju-Dong Kim, Jae-Woong Yun, Hyun-Jae Lee, Hyun-Jin Choi, Seong-Ho Joe, Young-June Gwon
  • Patent number: 12206420
    Abstract: Disclosed herein are a duty cycle monitoring method and apparatus for a memory interface, including receiving a clock signal as input and generating a first delay time offset and a second delay time offset, receiving the clock signal and the first delay time offset and then outputting a first delayed signal, receiving the first delayed signal and the second delay time offset and then outputting a second delayed signal, receiving the clock signal and the second delayed signal and then outputting a delay value corresponding to a half-period of the clock signal, and monitoring, based on the first delayed signal, whether a duty cycle of the clock signal conforms to a duty cycle specification.
    Type: Grant
    Filed: July 18, 2023
    Date of Patent: January 21, 2025
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yi-Gyeong Kim, Young-Su Kwon, Su-Jin Park, Young-Deuk Jeon, Min-Hyung Cho, Jae-Woong Choi
  • Publication number: 20240194241
    Abstract: Disclosed herein is an apparatus for adjusting a reference voltage. The apparatus may include a gate signal generation unit for generating an RDQS gate signal, a reference voltage generation unit for setting a reference voltage based on the RDQS gate signal, and a reset counter for holding a voltage at the time at which the RDQS gate signal becomes low when the RDQS gate signal is not applied to the reference voltage generation unit for a specific time period.
    Type: Application
    Filed: July 18, 2023
    Publication date: June 13, 2024
    Inventors: Young-Deuk JEON, Young-Su KWON, Yi-Gyeong KIM, Su-Jin PARK, Min-Hyung CHO, Jae-Woong CHOI
  • Publication number: 20240195399
    Abstract: Disclosed herein are a duty cycle monitoring method and apparatus for a memory interface, including receiving a clock signal as input and generating a first delay time offset and a second delay time offset, receiving the clock signal and the first delay time offset and then outputting a first delayed signal, receiving the first delayed signal and the second delay time offset and then outputting a second delayed signal, receiving the clock signal and the second delayed signal and then outputting a delay value corresponding to a half-period of the clock signal, and monitoring, based on the first delayed signal, whether a duty cycle of the clock signal conforms to a duty cycle specification.
    Type: Application
    Filed: July 18, 2023
    Publication date: June 13, 2024
    Inventors: Yi-Gyeong KIM, Young-Su KWON, Su-Jin PARK, Young-Deuk JEON, Min-Hyung CHO, Jae-Woong CHOI
  • Publication number: 20240179830
    Abstract: The present disclosure relates to a printed circuit board. The printed circuit board includes a plurality of insulating layers each having a plurality of concave portions; a plurality of conductor pattern layers disposed in a plurality of concave portions of each of the plurality of insulating layers; first and second via holes connected to one of the plurality of concave portions independently of each other and penetrating through at least two of the plurality of insulating layers independently of each other; and first and second via conductors disposed in the first and second via holes, respectively, and connecting two of the plurality of conductor pattern layers independently of each other. An average width of the first via conductor is greater than that of the second via conductor on a cross-section.
    Type: Application
    Filed: February 6, 2023
    Publication date: May 30, 2024
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Woong Choi, Jae Ho Shin
  • Publication number: 20240163139
    Abstract: Disclosed herein is an apparatus for receiving data from memory. The apparatus receives a data signal and a clock signal output from memory and includes a Decision Feedback Equalizer (DFE) including two or more differential signal path units configured to determine and output an output value corresponding to the data signal. Each of the two or more differential signal path units may determine a current output value by reflecting a previous output value fed back from a different one of the two or more differential signal path units in such a way that they operate at different clocks, and may include an offset control unit configured to adjust an offset at an input stage and a feedback control unit configured to change a load of an output stage using the previous output value fed back from the different one of the two or more differential signal path units.
    Type: Application
    Filed: November 10, 2023
    Publication date: May 16, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Young-deuk JEON, Young-Su KWON, Yi-Gyeong KIM, Su-Jin PARK, Min-Hyung CHO, Jae-Woong CHOI
  • Patent number: 11963311
    Abstract: A printed circuit board and a method of manufacturing the same are provided. The printed circuit board includes a wiring substrate including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers and having a cavity penetrating through a portion of the plurality of insulating layers, a passive component disposed in the cavity and including an external electrode electrically connected to at least one of the plurality of wiring layers, and a bridge disposed on the passive component in the cavity and including one or more circuit layers electrically connected to the external electrode.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Woong Choi, Yun Je Ji, Seung Eun Lee, Yong Hoon Kim
  • Publication number: 20240097841
    Abstract: Disclosed is a method of obfuscating a Controller Area Network (CAN) message performed by a first computing device including a processor, the method including: obtaining a first index from a first input value corresponding to a first time point by using an index output algorithm; determining a first CAN ID of the first computing device corresponding to the first index based on a predetermined CAN ID table; and generating a first normal CAN message including the first CAN ID and first normal data.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 21, 2024
    Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Huy Kang KIM, Hwejae LEE, Sangho LEE, Yeon Jae KANG, Daekwon PI, Jae Woong CHOI, Huiju LEE
  • Patent number: 11921158
    Abstract: Disclosed is a fan-out buffer which includes a first channel that includes a first delay circuit adjusting a first delay time of a calibration test signal depending on a first delay control signal, a second channel that includes a second delay circuit adjusting a second delay time of the calibration test signal depending on a second delay control signal, a first edge-to-pulse converter that detects a first edge included in a first time domain reflectometry (TDR) waveform of an output terminal of the first channel and generates a first start pulse signal including a first pulse, a second edge-to-pulse converter that generates a second start pulse signal including a second pulse, a stop pulse signal generator that generates a stop pulse signal including a first stop pulse, and a first delay control signal generator that calculates a phase difference generates the first delay control signal.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: March 5, 2024
    Inventors: Byung-Sung Kim, Yun-Hyok Choi, Gyuyeol Kim, Sungjung Kim, Cheol-Heui Park, Sanghoon Lee, Jae-Woong Choi
  • Publication number: 20240039931
    Abstract: [SUMMARY] A method of detecting a sequence-based intrusion by using a Database CAN (DBC) file, the method being performed by a computing device including a processor according to some exemplary embodiments of the present disclosure, includes: obtaining a first Controller Area Network (CAN) message generated from a CAN; determining the first CAN message as a first category among a plurality of categories based on a pre-stored DBC file; obtaining first predictive data from the first CAN message by using a pre-trained first neural network model, the pre-trained first neural network model corresponding to the first category and including a first hidden layer; and comparing the first predictive data and first actual data obtained based on the first CAN message to determine whether the first CAN message has an anomaly.
    Type: Application
    Filed: July 19, 2023
    Publication date: February 1, 2024
    Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Huy Kang KIM, Hwejae LEE, Sangho LEE, Yeon Jae KANG, Daekwon PI, Jae Woong CHOI, Huiju LEE
  • Publication number: 20230371173
    Abstract: An antenna module includes a wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers; an antenna disposed on an upper surface of the wiring structure; a heat dissipation structure disposed around the antenna on the upper surface of the wiring structure; and an encapsulant disposed on the upper surface of the wiring structure and covering at least a portion of each of the antenna and the heat dissipation structure.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 16, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae Woong Choi, Jin Won Lee