Patents by Inventor Jae Woong Nah

Jae Woong Nah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240421113
    Abstract: Systems and techniques that facilitate uniform qubit chip gaps via injection-molded solder pillars are provided. In various embodiments, a device can comprise one or more injection-molded solder interconnects. In various aspects, the one or more injection-molded solder interconnects can couple at least one qubit chip to an interposer chip. In various embodiments, the device can further comprise one or more injection-molded solder pillars. In various instances, the one or more injection-molded solder pillars can be between the at least one quit chip and the interposer chip. In various cases, the one or more injection-molded solder pillars can be in parallel with the one or more injection-molded solder interconnects. In various embodiments, the one or more injection-molded solder pillars can facilitate and/or maintain a uniform gap between the at least one qubit chip and the interposer chip.
    Type: Application
    Filed: August 26, 2024
    Publication date: December 19, 2024
    Inventors: Eric Peter Lewandowski, Jae-Woong Nah, Dongbing Shao
  • Publication number: 20240412090
    Abstract: Systems and techniques that facilitate coupling a superconducting cable to a interconnect chip and a quantum processor. In various embodiments, a system can comprise a quantum processor, one or more interconnect chips, and one or more cable connections. The quantum processor can comprise a plurality of qubits. Additionally, the one or more interconnect chips can be bonded to the quantum processor, and the one or more cable connections can be coupled to the one or more interconnect chips. With embodiments, the one or more interconnect chips can comprise one or more signal routings from the one or more cable connections to the quantum processor. Further, in embodiments, a first signal can pass from the one or more cable connections to at least one of the plurality of qubits.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 12, 2024
    Inventors: Neereja Sundaresan, Shawn Anthony Hall, Jason S. Orcutt, Jae-Woong Nah, Yves Martin, Wen-Sen Lu, John Michael Cotte
  • Patent number: 12107065
    Abstract: Systems and techniques that facilitate uniform qubit chip gaps via injection-molded solder pillars are provided. In various embodiments, a device can comprise one or more injection-molded solder interconnects. In various aspects, the one or more injection-molded solder interconnects can couple at least one qubit chip to an interposer chip. In various embodiments, the device can further comprise one or more injection-molded solder pillars. In various instances, the one or more injection-molded solder pillars can be between the at least one quit chip and the interposer chip. In various cases, the one or more injection-molded solder pillars can be in parallel with the one or more injection-molded solder interconnects. In various embodiments, the one or more injection-molded solder pillars can facilitate and/or maintain a uniform gap between the at least one qubit chip and the interposer chip.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: October 1, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric Peter Lewandowski, Jae-Woong Nah, Dongbing Shao
  • Publication number: 20240215460
    Abstract: A structure includes a first device having a first chip and a second chip. The second chip has a first side with a plurality of bumps and a second side with a plurality of first superconducting lines. A solder bonded layer attaches the first chip to the second chip. A second device has a first side with a plurality of pads facing the plurality of bumps in the second chip and a second side opposite the first side having a plurality of second superconducting lines. A solder shield material surrounds the plurality of bumps and the plurality of pads, and the plurality of bumps on the second chip are bonded to the plurality of pads on the second device. The solder shield material is connected to the plurality of first superconducting lines of the first device and to the plurality of second superconducting lines of the second device.
    Type: Application
    Filed: December 21, 2022
    Publication date: June 27, 2024
    Inventors: Baleegh Abdo, Jae-Woong Nah
  • Publication number: 20240203822
    Abstract: A chip and cooler assembly includes an active or passive interposer that has a front side and a back side. Integrated circuit chips are mounted onto the back side of the interposer. Each of the chips has a front side that is attached to the interposer and a back side that faces away from the interposer. Gaps separate the chips. The assembly also includes a frame that is fitted into the gaps between the chips. The frame is CTE-matched to the chips. The frame and the chips define a back side surface. A cooler module is attached to the back side surface. The cooler module is CTE-matched to the chips. The cooler module includes a microchannel cooler that is disposed directly against the back sides of the chips and a manifold that is attached to the microchannel cooler opposite the chips. The manifold is CTE-matched to the microchannel cooler.
    Type: Application
    Filed: December 18, 2022
    Publication date: June 20, 2024
    Inventors: Evan Colgan, Jae-Woong Nah, Katsuyuki Sakuma, Kamal K. Sikka, Joshua M. Rubin, Frank Robert Libsch
  • Patent number: 11990437
    Abstract: In an embodiment, a method for forming a solder bump includes preparing a transfer mold having a solder pillar extending from a mold substrate and through a first photoresist layer and having a shape partially defined by a second photoresist layer that is removed prior to transfer of the solder. In an embodiment, the mold substrate is flexible. In an embodiment, the transfer mold is flexible. In an embodiment, the method includes providing a device substrate having a wettable pad. In an embodiment, the method includes placing the transfer mold and the device substrate into aligned contact such that the solder pillar is in contact with the wettable pad. In an embodiment, the method includes forming a metallic bond between the solder pillar and the wettable pad. In an embodiment, the method includes removing the mold substrate and first photoresist layer.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: May 21, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Eric Peter Lewandowski, Jae-Woong Nah, Jeng-Bang Yau, Peter Jerome Sorce
  • Publication number: 20240038723
    Abstract: Systems and techniques that facilitate high-density flip-chip co-packages for superconducting qubits and parametric Josephson devices are provided. In various embodiments, a device can comprise a superconducting qubit wafer that can be coupled, by one or more first bump-bonds, to a parametric Josephson wafer. In various aspects, the device can further comprise a first underfill that surrounds the one or more first bump-bonds. In various instances, the first underfill can protect the parametric Josephson wafer from mechanical and/or chemical degradation associated with subsequent fabrication, processing, and/or handling of the superconducting qubit wafer.
    Type: Application
    Filed: July 27, 2022
    Publication date: February 1, 2024
    Inventors: Jae-Woong Nah, David Abraham, David Lokken-Toyli
  • Patent number: 11766729
    Abstract: An improved molten solder injection head having a vacuum filter and differential gauge system is provided. In one aspect, an injection head is provided. The injection head includes: a reservoir; an injection port on a bottom of the injection head connected to the reservoir; a vacuum port adjacent to the injection port on the bottom of the injection head connected to a vacuum source; and a filter disposed between the bottom of the injection head and the vacuum source. A method for molten solder injection using the present injection head is provided.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: September 26, 2023
    Assignee: International Business Machines Corporation
    Inventors: Jae-Woong Nah, John U. Knickerbocker, Eric P. Lewandowski
  • Patent number: 11749605
    Abstract: Devices and methods that can facilitate hybrid under-bump metallization components are provided. According to an embodiment, a device can comprise an under-bump metallization component that can comprise a superconducting interconnect component and a solder wetting component. The device can further comprise a solder bump that can be coupled to the superconducting interconnect component and the solder wetting component. In some embodiments, the superconducting interconnect component can comprise a hermetically sealed superconducting interconnect component.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: September 5, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jae-Woong Nah, Eric Peter Lewandowski, Adinath Shantinath Narasgond
  • Patent number: 11651973
    Abstract: A method and apparatus for bonding a processor wafer with a microchannel wafer/glass manifold to form a bonded wafer structure are provided. A glass fixture is also provided for protecting C4 solder bumps on chips disposed on the processor wafer. When the glass fixture is positioned on the processor wafer, posts extending from the glass fixture contact corresponding regions on the processor wafer devoid of C4 solder bumps, so that the glass fixture protects the C4 solder bumps during wafer bonding. The method involves positioning the processor wafer/glass fixture and the microchannel wafer/glass manifold in a metal fixture having one or more alignment structures adapted to engage corresponding alignment elements formed in the processor wafer, glass fixture and/or glass manifold. The metal fixture secures the wafer components in place and, after melting solder pellets disposed between the processor wafer/glass fixture and microchannel wafer/glass manifold, a bonded wafer structure is formed.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: May 16, 2023
    Assignee: International Business Machines Corporation
    Inventors: Jae-Woong Nah, Evan Colgan, Robert P. Kuder, II, James L. Speidell, Bucknell C. Webb
  • Patent number: 11541472
    Abstract: Apparatus and methods are disclosed for transferring solder to a substrate. A substrate belt moves one or more substrates in a belt direction. A decal has one or more through holes in a hole pattern that hold solder. Each of the solder holes can align with respective locations on one of the substrates. An ultrasonic head produces an ultrasonic vibration in the solder in a longitudinal direction perpendicular to the belt direction. The ultrasonic head and substrate can be moved together in the longitudinal direction to maintain the ultrasonic head in contact with the solder while the ultrasonic head applies the ultrasonic vibration. Various methods are disclosed including methods of transferring the solder with or without external heating.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: January 3, 2023
    Assignee: International Business Machines Corporation
    Inventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Paul Alfred Lauro, Da-Yuan Shih
  • Patent number: 11539088
    Abstract: Microbatteries and methods for forming microbatteries are provided. The microbatteries and methods address at least one or both of edge sealing issues for edges of a stack forming part of a microbatteries and overall sealing for individual cells for microbatteries in a batch process. A transferable solder molding apparatus and sealing structure are proposed in an example to provide a metal casing for a solid-state thin-film microbattery. An exemplary proposed process involves deposition or pre-forming low-temperature solder casing separately from the microbatteries. Then a thermal compression may be used to transfer the solder casing to each battery cell, with a handler apparatus in a batch process in an example. These exemplary embodiments can address the temperature tolerance constrain for solid state thin film battery during handling, metal sealing, and packaging.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: December 27, 2022
    Assignee: International Business Machines Corporation
    Inventors: Bing Dang, Leanna Pancoast, Jae-Woong Nah, John Knickerbocker
  • Patent number: 11522243
    Abstract: A method of manufacturing a micro-battery is provided. The method includes forming a micro-battery device by forming a first metal anode via and a first metal cathode via in a first substrate, forming a first metal layer on a bottom side of the first substrate, forming a first battery element on a top side of the substrate, forming an encapsulation layer around the first battery element, forming trenches through the encapsulation layer and the first substrate on different sides of the first battery element, and forming a metal sealing layer in the trenches to cover at least a plurality of sidewall surfaces of the first battery element. The metal sealing layer is electrically connected to the battery element through the first metal layer and the first metal cathode via.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: December 6, 2022
    Assignee: International Business Machines Corporation
    Inventors: Qianwen Chen, Jae-Woong Nah, Bing Dang, Leanna Pancoast, John Knickerbocker
  • Patent number: 11411272
    Abstract: A micro-battery is provided in which a metallic sealing layer is used to provide a hermetic seal between an anode side of the micro-battery and the cathode side of the micro-battery. In accordance with the present application, the metallic sealing layer is formed around a perimeter of each metallic anode structure located on the anode side and then the metallic sealing layer is bonded to a solderable metal layer of a wall structure present on the cathode side. The wall structure contains a cavity that exposes a metallic current collector structure, the cavity is filled with battery materials.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: August 9, 2022
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, Bing Dang, John U. Knickerbocker, Yang Liu, Jae-Woong Nah, Adinath Narasgond, Bucknell C. Webb
  • Publication number: 20220200086
    Abstract: A method of manufacturing a micro-battery is provided. The method includes forming a micro-battery device by forming a first metal anode via and a first metal cathode via in a first substrate, forming a first metal layer on a bottom side of the first substrate, forming a first battery element on a top side of the substrate, forming an encapsulation layer around the first battery element, forming trenches through the encapsulation layer and the first substrate on different sides of the first battery element, and forming a metal sealing layer in the trenches to cover at least a plurality of sidewall surfaces of the first battery element. The metal sealing layer is electrically connected to the battery element through the first metal layer and the first metal cathode via.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Inventors: Qianwen Chen, Jae-Woong Nah, Bing Dang, Leanna Pancoast, John Knickerbocker
  • Patent number: 11362382
    Abstract: A micro-battery is provided in which a metallic sealing layer is used to provide a hermetic seal between an anode side of the micro-battery and the cathode side of the micro-battery. In accordance with the present application, the metallic sealing layer is formed around a perimeter of each metallic anode structure located on the anode side and then the metallic sealing layer is bonded to a solderable metal layer of a wall structure present on the cathode side. The wall structure contains a cavity that exposes a metallic current collector structure, the cavity is filled with battery materials.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: June 14, 2022
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, Bing Dang, John U. Knickerbocker, Yang Liu, Jae-Woong Nah, Adinath Narasgond, Bucknell C. Webb
  • Patent number: 11288587
    Abstract: A modular superconducting quantum processor includes a first superconducting chip including a first plurality of qubits each having substantially a first resonance frequency and a second plurality of qubits each having substantially a second resonance frequency, the first resonance frequency being different from the second resonance frequency, and a second superconducting chip including a third plurality of qubits each having substantially the first resonance frequency and a fourth plurality of qubits each having substantially the second resonance frequency. The quantum processor further includes an interposer chip connected to the first superconducting chip and to the second superconducting chip. The interposer chip has interposer coupler elements configured to couple the second plurality of qubits to the fourth plurality of qubits.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: March 29, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hanhee Paik, Jae-Woong Nah, Paul S. Andry, Martin O. Sandberg
  • Patent number: 11270966
    Abstract: Protruding solder structures are created for electrical attachment of semiconductor devices. A rigid mold having one or more mold openings is attached to and used in combination with a decal structure that has one or more decal holes. The decal structure is disposed on the rigid mold so that the decal openings are aligned over the mold openings. Each of the decal hole and mold opening in contact form a single combined volume. The single combined volumes are filled with solder to form protruding solder structures. Various structures and methods of making and using the structures are disclosed.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: March 8, 2022
    Assignee: International Business Machines Corporation
    Inventors: Jae-Woong Nah, Stephen L. Buchwalter, Peter A. Gruber, Paul Alfred Lauro, Da-Yuan Shih
  • Publication number: 20220020715
    Abstract: Systems and techniques that facilitate uniform qubit chip gaps via injection-molded solder pillars are provided. In various embodiments, a device can comprise one or more injection-molded solder interconnects. In various aspects, the one or more injection-molded solder interconnects can couple at least one qubit chip to an interposer chip. In various embodiments, the device can further comprise one or more injection-molded solder pillars. In various instances, the one or more injection-molded solder pillars can be between the at least one quit chip and the interposer chip. In various cases, the one or more injection-molded solder pillars can be in parallel with the one or more injection-molded solder interconnects. In various embodiments, the one or more injection-molded solder pillars can facilitate and/or maintain a uniform gap between the at least one qubit chip and the interposer chip.
    Type: Application
    Filed: July 17, 2020
    Publication date: January 20, 2022
    Inventors: Eric Peter Lewandowski, Jae-Woong Nah, Dongbing Shao
  • Patent number: 11222862
    Abstract: Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 ?m to about 100 ?m, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: January 11, 2022
    Assignee: International Business Machines Corporation
    Inventors: Qianwen Chen, Bing Dang, Russell Budd, Bo Wen, Li-Wen Hung, Jae-Woong Nah, John Knickerbocker