Abstract: A serial comparator for comparing serially input data values with an internal data value in order to determine a command implementation requirement, having NOR gates for logic-adding two input data under the control of an output value obtained through an exclusive NOR gate, an inverter and a NAND gate, two latching circuits for latching the output from the NOR gate, two inverters for inverting the outputs from the latching circuits, and a NOR gate for outputting the equivalent value out of the inverted outputs from the two inverters, to output the lowermost bit value as a feedback to the NAND gate so as to output the uppermost address bit value. Accordingly, even in the case where the bit numbers of the input data and the internal data are variable, the operating characteristic becomes adapted to the semiconductor in which the input or output is carried out serially.