Abstract: Provided herein are a semiconductor memory device and a method of operating the same. The semiconductor memory device may include a memory cell array, a peripheral circuit, and a control logic. The memory cell array may include a plurality of memory cells. The peripheral circuit may perform a program operation on selected memory cells coupled to a selected word line among the plurality of memory cells. The control logic may control the program operation of the peripheral circuit. The program operation may include a plurality of program loops. Each of the program loops may include a program phase and a verify phase. The verify phase may include one or more verify operations. The control logic may be further configured to count a number of the verify operations performed by the peripheral circuit in the verify phase included in one of the plurality of program loops during the program operation.

Abstract: A memory device, and a method of operating the memory device, includes a memory block in which a plurality of cell pages are coupled to each of word lines. The memory device also includes a peripheral circuit configured to adjust a time point at which a verify voltage is applied to a selected word line among the word lines according to an order of performing a program operation during a verify operation of a selected cell page. The memory device further includes a control logic circuit configured to transmit, to the peripheral circuit, an operation code for adjusting a time point at which the verify voltage is output.

Abstract: A photovoltaic power generation system according to an embodiment of the present invention comprises: a first converter for converting and outputting power applied from a photovoltaic power generation panel; a second converter for receiving, via a first input/output terminal, the power output by the first converter, converting same, and outputting same via a second input/output terminal, or receiving power from the second input/output terminal, converting same, and outputting same via the first input/output terminal; a third converter for receiving power from the first converter or the second converter and charging an energy storage device, or transmitting power charged in the energy storage device to the second converter; and an active power filter for reducing ripples in the second converter, wherein power stored in the active power filter is transmitted to the first converter.

Abstract: A converter according to an embodiment of the present invention comprises: a voltage transformer unit which converts the input voltage of input power to a predetermined voltage and outputs same, and a control unit which controls the operating frequency of the voltage transformer unit according to states of the input power.

Abstract: Provided herein may be a memory device and a method of operating the same. The memory device may include a plurality of memory cell strings, a peripheral circuit configured to, using a plurality of read voltages, perform a read operation that reads data that is stored in a selected memory cell that is included in a selected memory cell string, and an operation controller configured to control the peripheral circuit to perform the read operation by using a first read voltage, a first potential adjustment operation, and the read operation by using a second read voltage that is lower than the first read voltage, wherein the first potential adjustment operation is an operation that applies a first turn-on voltage to unselected source select lines that are coupled to unselected memory cell strings for a first period and thereafter applies a ground voltage to the unselected source select lines.

Abstract: A memory device, and a method of operating the memory device, includes a memory block in which a plurality of cell pages are coupled to each of word lines. The memory device also includes a peripheral circuit configured to adjust a time point at which a verify voltage is applied to a selected word line among the word lines according to an order of performing a program operation during a verify operation of a selected cell page. The memory device further includes a control logic circuit configured to transmit, to the peripheral circuit, an operation code for adjusting a time point at which the verify voltage is output.

Abstract: A memory device having an improved operation speed may include a memory block including memory cells, a peripheral circuit configured to perform a program operation of increasing each of threshold voltages of the memory cells, and a control logic configured to control the peripheral circuit to perform the program operation. The program operation may include a plurality of program loops, each of the plurality of program loops may include a program voltage apply operation and a verify operation, and the control logic may control the peripheral circuit to perform verification on a highest program state during a verify operation included in a next program loop of any one program loop, when verification of a next higher program state among the plurality of program states is passed during a verify operation included in the any one program loop among the plurality of program loops.

Abstract: A photovoltaic power generation system according to an embodiment of the present invention comprises: a first converter for converting and outputting power applied from a photovoltaic power generation panel; a second converter for receiving, via a first input/output terminal, the power output by the first converter, converting same, and outputting same via a second input/output terminal, or receiving power from the second input/output terminal, converting same, and outputting same via the first input/output terminal; a third converter for receiving power from the first converter or the second converter and charging an energy storage device, or transmitting power charged in the energy storage device to the second converter; and an active power filter for reducing ripples in the second converter, wherein power stored in the active power filter is transmitted to the first converter.

Abstract: Provided herein may be a memory device and a method of operating the same. The memory device may include a plurality of memory cells coupled between a common source line and a bit line, a peripheral circuit configured to perform a plurality of program loops, each including a program voltage application operation of applying a program voltage to a selected memory cell and a verify operation of verifying a program state of the selected memory cell, and a control logic configured to control, at the program voltage application operation, the peripheral circuit to apply a precharge voltage to the common source line and change at least one of a magnitude of the precharge voltage and a time during which the precharge voltage is applied, depending on a magnitude of the program voltage.

Abstract: The AC/DC converter according to one embodiment of the present invention comprises: a power unit comprising a plurality of power input lines; a main bridge circuit into which input power is input via the power unit; a relay connected in parallel to both ends of any one of the power input lines; and a control unit for controlling the opening/closing of the relay on the basis of the type of input power.

Abstract: A memory device having an improved operation speed may include a memory block including memory cells, a peripheral circuit configured to perform a program operation of increasing each of threshold voltages of the memory cells, and a control logic configured to control the peripheral circuit to perform the program operation. The program operation may include a plurality of program loops, each of the plurality of program loops may include a program voltage apply operation and a verify operation, and the control logic may control the peripheral circuit to perform verification on a highest program state during a verify operation included in a next program loop of any one program loop, when verification of a next higher program state among the plurality of program states is passed during a verify operation included in the any one program loop among the plurality of program loops.

Abstract: Provided herein are a semiconductor memory device and a method of operating the same. The semiconductor memory device may include a memory cell array, a peripheral circuit, and a control logic. The memory cell array may include a plurality of memory cells. The peripheral circuit may perform a program operation on selected memory cells coupled to a word line selected from among the plurality of memory cells. The control logic may control the program operation of the peripheral circuit. The program operation may include a plurality of program loops. Each of the program loops may include a program phase and a verify phase. The verify phase may include one or more verify operations. The control logic may be further configured to count a number of the verify operations performed by the peripheral circuit in the verify phase included in one of the plurality of program loops during the program operation.