Patents by Inventor Jae-Yong KA

Jae-Yong KA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Transistor array panel and manufacturing method thereof
    Patent number: 10741586
    Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: August 11, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae Gyun Kim, Jae-Yong Ka, Pil Soon Hong
  • TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    Publication number: 20190341405
    Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.
    Type: Application
    Filed: July 18, 2019
    Publication date: November 7, 2019
    Inventors: Tae Gyun KIM, Jae-Yong Ka, Pil Soon Hong
  • Transistor array panel and manufacturing method thereof
    Patent number: 10396096
    Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: August 27, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae Gyun Kim, Jae-Yong Ka, Pil Soon Hong
  • TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF
    Publication number: 20180175072
    Abstract: A transistor array panel includes a transistor which includes a gate electrode, a semiconductor layer on the gate electrode, and a source electrode and a drain electrode on the semiconductor layer. The semiconductor layer includes a first portion overlapping the source electrode, a second portion overlapping the drain electrode, and a third portion between the first portion and the second portion. The first portion, the second portion, and the third portion have different minimum thicknesses.
    Type: Application
    Filed: October 23, 2017
    Publication date: June 21, 2018
    Inventors: Tae Gyun KIM, Jae-Yong KA, Pil Soon HONG