Patents by Inventor Jae-Yoon Sim
Jae-Yoon Sim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250094851Abstract: Disclosed is a multi-constraint qubit allocation method and a quantum apparatus using the same. The method comprises generating an interaction graph representing a quantum circuit on the basis of the number of two-qubit gates, determining edge weights between connected nodes in the interaction graph by introducing a fitting coefficient for a decay effect, searching for an isomorphic part, layout graph, between target hardware and the interaction graph by graph matching, and performing frequency matching for a layout graph by searching for frequency allocated to each location of qubits by limiting unidirectional movement on each of an x-axis and a y-axis of a hardware plane of the target hardware to a range from ?1 to +1.Type: ApplicationFiled: December 15, 2023Publication date: March 20, 2025Applicant: POSTECH Research and Business Development FoundationInventors: Seok Hyeong KANG, Sung Hye PARK, Jae Yoon SIM, Do Hun KIM
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Publication number: 20250045617Abstract: Provided is a qubit state reading apparatus including a probe signal provider configured to provide a probe signal to a qubit and a readout module configured to receive a qubit signal output from the qubit to which the probe signal is provided and read a state of the qubit, in which the readout module includes a local oscillation (LO) signal generator configured to generate an LO signal, a mixer configured to down-convert the qubit signal using the LO signal, an accumulator configured to accumulate output signals of the mixer, and a comparator configured to compare an output signal of the accumulator with a threshold and output a signal corresponding to the state of the qubit, and the readout module down-converts the qubit signal and the LO signal in a homodyne manner.Type: ApplicationFiled: July 26, 2024Publication date: February 6, 2025Applicant: POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATIONInventors: Jae Yoon SIM, Dong Gyu MINN
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Patent number: 12206437Abstract: The present disclosure relates to a time-division multiplexing (TDM)-based multi-channel electrocardiogram measurement apparatus and method, which remove the influence of power line interference in a way to implement multiple channels by using a TDM method, remove an electrode DC offset (EDO) through a pre-charged capacitor, and periodically take a current out or supply a current. The TDM-based multi-channel electrocardiogram measurement apparatus and method robust against power line interference according to the present disclosure have advantages in that it can measure electrocardiogram by using multiple channels with low power and high integration based on TDM, can perform contactless measurement because an EDO is efficiently eliminated and high impedance is satisfied, and has a characteristic robust against power line interference.Type: GrantFiled: November 16, 2022Date of Patent: January 21, 2025Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATIONInventors: Jae Yoon Sim, Kyu Jin Choi
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Patent number: 12166868Abstract: An exemplary embodiment of the present disclosure provides a physically unclonable function (PUF) cell capable of exhibiting a stable performance and showing an excellent repeatability while being less affected by environmental factors such as a noise, temperature, and bias voltage. The PUF cell generates an output value by combining a scheme of amplifying a threshold voltage difference and a scheme of amplifying an oscillation frequency difference. In an oscillator that generates oscillation signals of different frequencies, the frequency difference of the oscillation signals is amplified by alternately supplying bias voltages of different magnitudes generated by utilizing the threshold voltage difference to a plurality of stages in the oscillator.Type: GrantFiled: May 4, 2022Date of Patent: December 10, 2024Assignee: POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATIONInventors: Jae Han Park, Jae Yoon Sim
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Publication number: 20240402518Abstract: The present invention relates to a smart remotely controlled contact lens for diagnosing and treating diseases by using a micro-LED. The present invention can diagnose and treat diseases by using a micro-LED or-OLED disposed in a contact lens. Further, the present invention can treat various diseases by using signals according to light wavelengths detected through a photodetector to control drug release from a drug delivery system in the contact lens. The drug delivery system that is a small-sized ocular insert can be electrically controlled. Accordingly, drug can be released from the drug delivery system at a desired time, and thus the drug delivery system can be applied to treatment of various diseases. Further, the photodetector can detect the therapeutic effect in real time through light reflected from a treated target cell, and thus the disease progression in a patient can be easily and quickly checked.Type: ApplicationFiled: June 17, 2024Publication date: December 5, 2024Inventors: Sei Kwang Hahn, Geonhui Lee, Jae-Yoon Sim, Jahyun Koo, Dohee Keum
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Publication number: 20240396344Abstract: Disclosed is an energy harvesting method of an energy harvesting apparatus configured to convert input power coming from an energy source using a switching frequency, which is generated by monitoring an input voltage, and a first time and a second time, which are on-times of a first switch and a second switch, respectively, and generated based on the switching frequency, and deliver the converted input power to a battery.Type: ApplicationFiled: October 24, 2023Publication date: November 28, 2024Applicant: POSTECH Research and Business Development FoundationInventors: Jae Yoon SIM, Hee Sung ROH
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Publication number: 20240283403Abstract: Disclosed an oscillator circuit device includes: a resistor circuit comprising a first resistor disposed between a first supply voltage level and an output node; a resistor-capacitor circuit comprising a second resistor and at least one capacitor disposed between the output node and a second supply voltage level and connected in series, and a switch capable of discharging electric charges accumulated in the at least one capacitor; and a comparator configured to compare a voltage level to be compared obtained from the resistor circuit with a predetermined reference to allow the switch to be opened and closed according to a comparison result.Type: ApplicationFiled: February 20, 2024Publication date: August 22, 2024Applicant: POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATIONInventors: Jae Yoon SIM, Young Woo JI
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Publication number: 20240120938Abstract: The present disclosure relates to a time-division multiplexing (TDM)-based multi-channel electrocardiogram measurement apparatus and method, which remove the influence of power line interference in a way to implement multiple channels by using a TDM method, remove an electrode DC offset (EDO) through a pre-charged capacitor, and periodically take a current out or supply a current. The TDM-based multi-channel electrocardiogram measurement apparatus and method robust against power line interference according to the present disclosure have advantages in that it can measure electrocardiogram by using multiple channels with low power and high integration based on TDM, can perform contactless measurement because an EDO is efficiently eliminated and high impedance is satisfied, and has a characteristic robust against power line interference.Type: ApplicationFiled: November 16, 2022Publication date: April 11, 2024Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATIONInventors: Jae Yoon SIM, Kyu Jin CHOI
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Publication number: 20230318829Abstract: The present disclosure provides a cryptographic processor device capable of performing the post-quantum cryptographic encryption with in a high speed with low power, allowing a change of encryption parameters, and handling various cryptographic protocols. The cryptographic processor device executing polynomial vector operations required for a post-quantum cryptography includes: a polynomial memory bank configured to store a plurality of polynomial vectors; and an arithmetic and logic operator configured to perform operation on the polynomial vectors.Type: ApplicationFiled: March 27, 2023Publication date: October 5, 2023Applicant: POSTECH Research and Business Development FoundationInventors: Jae Yoon SIM, Byung Jun KIM
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Publication number: 20230044357Abstract: An exemplary embodiment of the present disclosure provides a physically unclonable function (PUF) cell capable of exhibiting a stable performance and showing an excellent repeatability while being less affected by environmental factors such as a noise, temperature, and bias voltage. The PUF cell generates an output value by combining a scheme of amplifying a threshold voltage difference and a scheme of amplifying an oscillation frequency difference. In an oscillator that generates oscillation signals of different frequencies, the frequency difference of the oscillation signals is amplified by alternately supplying bias voltages of different magnitudes generated by utilizing the threshold voltage difference to a plurality of stages in the oscillator.Type: ApplicationFiled: May 4, 2022Publication date: February 9, 2023Applicant: POSTECH Research and Business Development FoundationInventors: Jae Han PARK, Jae Yoon SIM
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Patent number: 11552623Abstract: The present disclosure provides a device and method of generating a nonlinear waveform signal dissipating low power and operating at a high speed. The device includes: a digital preprocessing unit configured to quantize an effective input signal to generate a linear data signal and a residual signal that is a difference between the effective input signal and the linear data signal; a nonlinear digital-to-analog conversion circuit (DAC) having a nonlinear relationship between an input and an output and configured to convert the linear data signal into a first analog signal; a linear interpolation DAC configured to convert the residual signal into a second analog signal to enable a generation of a converted analog signal by an addition of the second analog signal to the first analog signal; and an output circuit configured to output the converted analog signal as a nonlinear waveform signal.Type: GrantFiled: December 22, 2021Date of Patent: January 10, 2023Assignee: POSTECH Research and Business Development FoundationInventors: Jae Yoon Sim, Ki Seo Kang
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Patent number: 11526763Abstract: A neuromorphic system includes a first neuromorphic layer configured to perform a forward operation with an input signal and a first weight, a first operation circuit configured to perform a first operation on a result of the forward operation of the first neuromorphic layer, a second neuromorphic layer configured to perform a forward operation with an output signal of the first operation circuit and a second weight, a second operation circuit configured to perform a second operation on a result of the forward operation of the second neuromorphic layer, a first weight adjustment amount calculation circuit configured to calculate a first weight adjustment amount, and a second weight adjustment amount calculation circuit configured to calculate a second weight adjustment amount.Type: GrantFiled: November 1, 2019Date of Patent: December 13, 2022Assignees: SK hynix Inc., POSTECH ACADEMY-INDUSTRY FOUNDATIONInventors: Hyunwoo Son, Jae-Yoon Sim
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Publication number: 20220209755Abstract: The present disclosure provides a device and method of generating a nonlinear waveform signal dissipating low power and operating at a high speed. The device includes: a digital preprocessing unit configured to quantize an effective input signal to generate a linear data signal and a residual signal that is a difference between the effective input signal and the linear data signal; a nonlinear digital-to-analog conversion circuit (DAC) having a nonlinear relationship between an input and an output and configured to convert the linear data signal into a first analog signal; a linear interpolation DAC configured to convert the residual signal into a second analog signal to enable a generation of a converted analog signal by an addition of the second analog signal to the first analog signal; and an output circuit configured to output the converted analog signal as a nonlinear waveform signal.Type: ApplicationFiled: December 22, 2021Publication date: June 30, 2022Inventors: Jae Yoon SIM, Ki Seo KANG
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Patent number: 11193962Abstract: An electronic circuit includes first to third transistors. The first transistor has a first channel width and a first channel length and generates a first potential difference by passing an operating current based on a first operating voltage. The second transistor has a second channel width and a second channel length and generates a second potential difference based on the operating current. The third transistor generates a third potential difference based on a second operating voltage and the operating current. A sum of a level of the first operating voltage and a level of the first potential difference corresponds to a sum of a level of the second operating voltage, a level of the second potential difference, and a level of the third potential difference. The first channel width is greater than the second channel width, or the first channel length is longer than the second channel length.Type: GrantFiled: April 14, 2020Date of Patent: December 7, 2021Assignee: POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATIONInventors: Jae Yoon Sim, Young Woo Ji
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Patent number: 11188816Abstract: Disclosed are a method and an apparatus for detecting spike event or transmitting spike event information generated in a neuromorphic chip. The apparatus for detecting spike event generated in a neuromorphic chip may detect spike event information for a plurality of neurons included in the neuromorphic chip based on a neuron group.Type: GrantFiled: January 22, 2020Date of Patent: November 30, 2021Assignees: Samsung Electronics Co., Ltd., POSTECH ACADEMY-INDUSTRY FOUNDATIONInventors: Jun Seok Kim, Jae Yoon Sim, Hyun Surk Ryu
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Publication number: 20200393500Abstract: An electronic circuit includes first to third transistors. The first transistor has a first channel width and a first channel length and generates a first potential difference by passing an operating current based on a first operating voltage. The second transistor has a second channel width and a second channel length and generates a second potential difference based on the operating current. The third transistor generates a third potential difference based on a second operating voltage and the operating current. A sum of a level of the first operating voltage and a level of the first potential difference corresponds to a sum of a level of the second operating voltage, a level of the second potential difference, and a level of the third potential difference. The first channel width is greater than the second channel width, or the first channel length is longer than the second channel length.Type: ApplicationFiled: April 14, 2020Publication date: December 17, 2020Applicant: POSTECH Research and Business Development FoundationInventors: Jae Yoon SIM, Young Woo JI
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Publication number: 20200319479Abstract: The present invention relates to a smart remotely controlled contact lens for diagnosing and treating diseases by using a micro-LED. The present invention can diagnose and treat diseases by using a micro-LED or -OLED disposed in a contact lens. Further, the present invention can treat various diseases by using signals according to light wavelengths detected through a photodetector to control drug release from a drug delivery system in the contact lens. The drug delivery system that is a small-sized ocular insert can be electrically controlled. Accordingly, drug can be released from the drug delivery system at a desired time, and thus the drug delivery system can be applied to treatment of various diseases. Further, the photodetector can detect the therapeutic effect in real time through light reflected from a treated target cell, and thus the disease progression in a patient can be easily and quickly checked.Type: ApplicationFiled: December 21, 2017Publication date: October 8, 2020Inventors: Sei Kwang Hahn, Geonhui Lee, Jae-Yoon Sim, Jahyun Koo, Dohee Keum
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Patent number: 10739811Abstract: The present invention relates to a design technology of a phase locked loop (PLL) for generating an accurate clock frequency in a clock synchronization system. The present invention suggests a new structure based on a hardware description language (HDL), and thus reduces a chip area of a frequency synthesizer while obtaining a wide frequency operation range. Furthermore, since only the HDL is used, the entire frequency synthesizer becomes all-synthesizable, and auto layout (auto P&R) can be achieved through a tool, which makes it possible to reduce a design cost of a designer.Type: GrantFiled: November 30, 2017Date of Patent: August 11, 2020Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATIONInventors: Jae Yoon Sim, Hwa Suk Cho
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Publication number: 20200202217Abstract: A neuromorphic system includes a first neuromorphic layer configured to perform a forward operation with an input signal and a first weight, a first operation circuit configured to perform a first operation on a result of the forward operation of the first neuromorphic layer, a second neuromorphic layer configured to perform a forward operation with an output signal of the first operation circuit and a second weight, a second operation circuit configured to perform a second operation on a result of the forward operation of the second neuromorphic layer, a first weight adjustment amount calculation circuit configured to calculate a first weight adjustment amount, and a second weight adjustment amount calculation circuit configured to calculate a second weight adjustment amount.Type: ApplicationFiled: November 1, 2019Publication date: June 25, 2020Inventors: Hyunwoo SON, Jae-Yoon SIM
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Patent number: 10666236Abstract: The present invention relates to a technology capable of compensating for a frequency error in a quadrature relaxation oscillator. The quadrature relaxation oscillator generates a signal at a desired frequency by using a resistor and a capacitor which are less sensitive to a PVT (Process, Voltage, Temperature) variation, generates a signal at a desired frequency by compensating for an error from design, which is caused by a mismatch between circuits due to a characteristic of a semiconductor process, through a feedback lop, and removes noise.Type: GrantFiled: November 30, 2017Date of Patent: May 26, 2020Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATIONInventors: Jae Yoon Sim, Ja Hyun Koo