Abstract: Disclosed is a battery module, which includes: a battery cell assembly having at least one battery cell; a module case configured to accommodate the battery cell assembly; and at least one injection hole provided in a bottom portion of the module case to inject a thermally conductive adhesive into the module case.

Abstract: A complementary thin film transistor (TFT) includes a substrate and a first TFT and a second TFT disposed on the substrate, wherein a first conductive semiconductor layer of the first TFT and a second gate electrode layer of the second TFT are disposed in the same layer and include the same material.

Abstract: According to the disclosed substrate processing apparatus, a first bowl is located to correspond to a substrate, and a first chemical solution supply module supplies a first chemical solution while a support module rotates at a first speed, and a second bowl is located to correspond to the substrate, and a second chemical solution supply module supplies a second chemical solution at a first flow rate while a support module rotates at a second speed equal to or smaller than the first speed, and the second bowl is located to correspond to the substrate, and the second chemical solution supply module does not supply the second chemical solution or supplies the second chemical solution at a second flow rate smaller than the first flow rate while the support module rotates at a third speed smaller than the second speed.

Abstract: An inkjet apparatus for display manufacturing includes a nozzle unit having a discharge port for discharging ink to a substrate, a charging unit disposed on a side of the nozzle unit and charging the ink, and an accelerating electrode disposed on an opposite side of the nozzle unit with the substrate interposed therebetween, and accelerating the ink towards the substrate by electrical attraction.

Abstract: A particle alignment device for a micro LED display, the particle alignment device includes a glass electrode arranged on one surface of the glass substrate on which a pattern is formed, a gripper supporting a glass substrate, the gripper including a gripper electrode interposed between the glass substrate and the gripper, a resistance unit connecting the glass electrode, and an AC signal generator connected to the gripper electrode to generate an AC signal. The glass electrode and the gripper electrode are arranged to oppose each other with the glass substrate interposed therebetween.

Abstract: According to an embodiment of the present disclosure, a processing liquid supply nozzle includes a nozzle body, a nozzle tip member connected to a lower portion of the nozzle body, and a fastening member that is disposed between the nozzle body and the nozzle tip member to connect the nozzle body and the nozzle tip member to each other and introduces air into the nozzle body and the nozzle tip member.

Abstract: According to the disclosed substrate processing apparatus, a first bowl is located to correspond to a substrate, and a first chemical solution supply module supplies a first chemical solution while a support module rotates at a first speed, and a second bowl is located to correspond to the substrate, and a second chemical solution supply module supplies a second chemical solution at a first flow rate while a support module rotates at a second speed equal to or smaller than the first speed, and the second bowl is located to correspond to the substrate, and the second chemical solution supply module does not supply the second chemical solution or supplies the second chemical solution at a second flow rate smaller than the first flow rate while the support module rotates at a third speed smaller than the second speed.

Abstract: Provided is a support unit for supporting a substrate, the support unit including: a heating member configured to transmit thermal energy to a supported substrate; a reflective plate disposed under the heating member and configured to reflect thermal energy generated by the heating member to the substrate; a cooling plate disposed under the reflective plate and formed with a cooling flow path in which a cooling fluid flows; and a gas supply line configured to supply gas to a space between the reflective plate and the cooling plate.

Abstract: An apparatus for supplying chemical liquid may include a chemical liquid discharging member, a reservoir, a chemical liquid supplying member and a chemical liquid circulating member. The chemical liquid discharging member may discharge a chemical liquid onto a substrate. The reservoir may store the chemical liquid supplied to the chemical liquid discharging member. The chemical liquid supplying member may supply the chemical liquid stored in the reservoir. The chemical liquid circulating member may circulate the chemical liquid from the chemical liquid discharging member to the reservoir.

Abstract: An apparatus for supplying chemical liquid may include a chemical liquid discharging member, a reservoir, a chemical liquid supplying member and a chemical liquid circulating member. The chemical liquid discharging member may discharge a chemical liquid onto a substrate. The reservoir may store the chemical liquid supplied to the chemical liquid discharging member. The chemical liquid supplying member may supply the chemical liquid stored in the reservoir. The chemical liquid circulating member may circulate the chemical liquid from the chemical liquid discharging member to the reservoir.

Abstract: A system-on-chip (SoC) to perform a deadlock control on a processor of the SoC, the SoC including the processor including a plurality of central processing unit (CPU) cores, a first bus connected to the processor, a graphic processing unit (GPU) connected to the first bus, a memory controller connected to the first bus, a second bus connected to the processor, an isolation cell including a logic circuit configured to retain a signal value input to the processor according to an isolation signal, and a deadlock controller connected to the first bus and the second bus. The deadlock controller is configured to isolate the processor, which is in a deadlock state, from the first bus by applying the isolation signal on the isolation cell, and to extract, via the second bus, state information of the isolated processor in the deadlock state.

Abstract: Embodiments of the inventive concept relate to an apparatus for supporting a substrate and a method for treating a substrate. The substrate support apparatus includes a substrate support member including a support plate having an upper surface that supports a substrate, and a heating member provided in the support plate to heat the substrate, wherein an area of the support plate has a buffer area, in which a buffer space for restricting a heat transfer rate of heat provided from the heating member to the upper surface is formed. The buffer space insulates a central area and a peripheral area, thereby maximizing a temperature difference between the central area and the peripheral area.

Abstract: A bubble removing unit is disclosed including a body having an inner space, through which a liquid flows, in an interior thereof, a liquid introducing pipe through which the liquid is supplied to the body, a liquid discharging pipe through which the liquid, from which bubbles are removed, is discharged from the body, a bubble discharging pipe through which the bubbles are discharged from the inner space, and a rod-shaped bar situated in the inner space and a length of which extends in a lengthwise direction of the body, wherein a variable cross-section part situated between the liquid introducing pipe and the liquid discharging pipe and a cross-section of which varies along the lengthwise direction of the body is provided in the inner space of the body.

Abstract: A system-on-chip (SoC) to perform a deadlock control on a processor of the SoC, the SoC including the processor including a plurality of central processing unit (CPU) cores, a first bus connected to the processor, a graphic processing unit (GPU) connected to the first bus, a memory controller connected to the first bus, a second bus connected to the processor, an isolation cell including a logic circuit configured to retain a signal value input to the processor according to an isolation signal, and a deadlock controller connected to the first bus and the second bus. The deadlock controller is configured to isolate the processor, which is in a deadlock state, from the first bus by applying the isolation signal on the isolation cell, and to extract, via the second bus, state information of the isolated processor in the deadlock state.

Abstract: A system includes a plurality of hardware blocks, a deadlock detector and an interconnect device. The hardware blocks include a processor executing instructions and a storage device storing data. The deadlock detector monitors operations of a target hardware block among the plurality of hardware blocks in realtime to store debugging information in the storage device. The interconnect device electrically connects the deadlock detector and the plurality of hardware blocks. The interconnect device includes a system bus electrically connecting the plurality of hardware blocks and a debugging bus electrically connecting the deadlock detector to the target hardware block and the storage device. The interconnect device includes a system bus electrically connecting the plurality of hardware blocks and a debugging bus electrically connecting the deadlock detector to the target hardware block and the storage device.

Abstract: A system-on-chip (SoC) to perform a deadlock control on a processor of the SoC, the SoC including the processor including a plurality of central processing unit (CPU) cores, a first bus connected to the processor, a graphic processing unit (GPU) connected to the first bus, a memory controller connected to the first bus, a second bus connected to the processor, an isolation cell including a logic circuit configured to retain a signal value input to the processor according to an isolation signal, and a deadlock controller connected to the first bus and the second bus. The deadlock controller is configured to isolate the processor, which is in a deadlock state, from the first bus by applying the isolation signal on the isolation cell, and to extract, via the second bus, state information of the isolated processor in the deadlock state.

Abstract: Embodiments of the inventive concept relate to an apparatus for supporting a substrate and a method for treating a substrate. The substrate support apparatus includes a substrate support member including a support plate having an upper surface that supports a substrate, and a heating member provided in the support plate to heat the substrate, wherein an area of the support plate has a buffer area, in which a buffer space for restricting a heat transfer rate of heat provided from the heating member to the upper surface is formed. The buffer space insulates a central area and a peripheral area, thereby maximizing a temperature difference between the central area and the peripheral area.

Abstract: A system-on-chip (SoC) to perform a deadlock control on a processor of the SoC includes a processor of the SoC including a plurality of central processing unit (CPU) cores, a first bus connected to the processor, a graphic processing unit (GPU) connected to the first bus, a memory controller connected to the first bus, a second bus connected to the processor, an isolation cell including a logic circuit configured to retain a signal value input to the processor according to an isolation signal, and a deadlock controller connected to the first bus and the second bus, the deadlock controller being configured to isolate the processor, which is in a deadlock state, from the first bus by applying the isolation signal on the isolation cell, and extract, via the second bus, state information of the isolated processor in the deadlock state.

Abstract: A central processing unit (CPU) system includes a CPU configured to execute a program based on multiple pieces of register information, a CPU hang-up detector configured to detect a hang-up state of the CPU and generate a CPU hang-up occurrence signal, and a memory that stores debug logic configured to gather the multiple pieces of register information from the CPU in response to the CPU hang-up occurrence signal before a reset operation for the CPU is performed.

Abstract: A bubble removing unit is disclosed including a body having an inner space, through which a liquid flows, in an interior thereof, a liquid introducing pipe through which the liquid is supplied to the body, a liquid discharging pipe through which the liquid, from which bubbles are removed, is discharged from the body, a bubble discharging pipe through which the bubbles are discharged from the inner space, and a rod-shaped bar situated in the inner space and a length of which extends in a lengthwise direction of the body, wherein a variable cross-section part situated between the liquid introducing pipe and the liquid discharging pipe and a cross-section of which varies along the lengthwise direction of the body is provided in the inner space of the body.