Abstract: A joining structure for a suspension includes a lower arm fastened at a first end portion thereof to a vehicle body, a fixed knuckle at which a strut portion is located, a rotary knuckle located inside the fixed knuckle and fastened to a wheel to be rotatable about the fixed knuckle, a fastening unit fastened to the first end portion of the lower arm and a lower end portion of the fixed knuckle, a steering input portion located at the fixed knuckle and applying a steering force to the rotary knuckle during steering, and a tie rod fastened between the fixed knuckle and the vehicle body.

Abstract: The present disclosure provides a method and device for refining waste plastic pyrolysis oil, the method including (S1) subjecting a waste plastic pyrolysis oil feedstock to a heat treatment by charging the waste plastic pyrolysis oil feedstock into a rotary kiln reactor and increasing a temperature of the rotary kiln reactor to form a product; (S2) recovering a gas component from the product of step (S1); (S3) separating a high boiling point wax component from the recovered gas component and re-supplying the separated high boiling point wax component to the rotary kiln reactor in step (S1); and (S4) recovering refined oil from the gas component from which the high boiling point wax component is removed.

Abstract: A device for reprogramming an electronic control unit (ECU) is configured to store controller area network (CAN) frames in a temporary storage medium, transmit the CAN frames to a main storage medium when the temporary storage medium receives a certain capacity, and minimize the time required for reprogramming. The device for reprogramming the ECU may be linked to an artificial intelligence module, a robot, an augmented reality (AR) device, a virtual reality (VR) device, and a device related to 5G service.

Abstract: The present invention discloses an encoding apparatus using a Discrete Cosine Transform (DCT) scanning, which includes a mode selection means for selecting an optimal mode for intra prediction; an intra prediction means for performing intra prediction onto video inputted based on the mode selected in the mode selection means; a DCT and quantization means for performing DCT and quantization onto residual coefficients of a block outputted from the intra prediction means; and an entropy encoding means for performing entropy encoding onto DCT coefficients acquired from the DCT and quantization by using a scanning mode decided based on pixel similarity of the residual coefficients.

Abstract: A method for controlling driving of a hybrid electric vehicle includes collecting driving data while the hybrid electric vehicle is driven, determining whether the hybrid electric vehicle enters a first mode corresponding to emergency driving of the hybrid electric vehicle or a second mode corresponding to control in preparation for the emergency driving, and controlling the hybrid electric vehicle in accordance with a mode that the hybrid electric vehicle enters among the first mode and the second mode.

Abstract: A holographic optical element and a method for producing the same are disclosed herein. In some embodiments, a method includes illuminating a first surface of a photopolymer resin layer, where the photopolymer resin layer comprises a photopolymer resin, illuminating a second surface of the photopolymer resin layer through a retardation layer disposed in the second surface, wherein the second surface is opposite the first surface, and recording an interference pattern in the photopolymer resin layer, wherein the interference pattern is created by interference between the first parallel laser beam and the second parallel laser beam. The holographic optical element is produced using a retardation layer to prevent an unwanted interference pattern from being formed in the process of recording an interference pattern in a photopolymer resin layer.

Abstract: A positive electrode active material and a method of making the same are disclosed herein. In some embodiments, a method includes mixing transition metal raw powders including a nickel raw powder to prepare a first mixture, where the first mixture has a molar ratio of lithium to total transition metals of 0.95 to 1.02, and where a molar ratio of nickel to total transition metals is 80 mol % or more, sintering the first mixture in an oxygen-containing atmosphere, and cooling the sintered first mixture to obtain a first sintered product, mixing the first sintered product with a second lithium raw material to prepare a second mixture, where the second mixture has molar ratio of lithium to total transition metals of 1.00 to 1.09, and sintering the second mixture in the oxygen-containing atmosphere to prepare a lithium composite transition metal oxide in the form of a single particle.

Abstract: A positive electrode active material and a method for manufacturing the same are disclosed herein. In some embodiments, a method includes mixing and grinding raw material particles to obtain ground product particles, where the raw material particles are source materials for a lithium composite transition metal oxide, sintering the ground product particles to synthesize the lithium composite transition metal oxide, and disaggregating and classifying the synthesized lithium composite transition metal oxide to obtain a positive electrode active material powder, wherein the mixing and grinding the raw materials includes placing the raw materials and beads in a chamber of a grinding device, where the grinding device includes a rotatable rotor in the chamber, and performing a dry process of mixing and grinding the raw material particles in the chamber by rotating the rotor to give kinetic energy to the beads, causing collisions between the beads and the raw material particles.

Abstract: A device and method for data rate selection in data transmission is provided, having a first register for storing an N bit data upon clocking by a first clock; a second at least one register for storing the N bit data upon clocking by a second clock, the second clock having a clock rate of two times the clock rate of the first clock; a circuit for receiving the N bit data output from the first register and outputting a first half of the N bit data during a first phase of the first clock and outputting a second half of the N bit data during a second phase of the first clock; and a multiplexer for receiving as first inputs the output of the circuit and second inputs the output of the second at least one register, wherein the multiplexer outputs the first inputs as a lower speed data and outputs the second inputs as a higher speed data based on a rate select signal.

Abstract: A device and method for data rate selection in data transmission is provided, having a first register for storing an N bit data upon clocking by a first clock; a second at least one register for storing the N bit data upon clocking by a second clock, the second clock having a clock rate of two times the clock rate of the first clock; a circuit for receiving the N bit data output from the first register and outputting a first half of the N bit data during a first phase of the first clock and outputting a second half of the N bit data during a second phase of the first clock; and a multiplexer for receiving as first inputs the output of the circuit and second inputs the output of the second at least one register, wherein the multiplexer outputs the first inputs as a lower speed data and outputs the second inputs as a higher speed data based on a rate select signal.

Abstract: A circuit for serializing parallel data of n bits, comprising a first register for storing m bits of the parallel data, M being less than N, the first register being clocked by a first clock, at least one second register other than the first register for storing at least N-M bits of the parallel data, the at least one second register being clocked by at least one second clock which is different in phase from the first clock, at least one third register for storing at least the nth and (n−1)th bits of parallel data output from the at least one second register, the third register being clocked by at least one third clock which is different in phase from the first and the second clocks, and logic gates for receiving as inputs the n bits of parallel data output from the first register and output from one or both of the at least one second register and the third register to form N serial data.