Patents by Inventor Jae Yun Yl

Jae Yun Yl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7989912
    Abstract: The semiconductor device includes a lower device isolation structure formed in a semiconductor substrate to define an active region. The lower device isolation structure has a first compressive stress. An upper device isolation structure is disposed over the lower device isolation structure. The upper device isolation structure has a second compressive stress greater than the first compressive stress. A gate structure is disposed over the active region between the neighboring upper device isolation structures.
    Type: Grant
    Filed: May 7, 2009
    Date of Patent: August 2, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jae Yun Yl