Patents by Inventor Jaeduk CHOI

Jaeduk CHOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250062229
    Abstract: A semiconductor device includes a first semiconductor structure that includes a first substrate, circuit devices on the first substrate, a lower interconnection structure, and a lower bonding structure; and a second semiconductor structure disposed on and connected to the first semiconductor structure The second semiconductor structure includes a stack structure; channel structures that including a first portion that penetrate through the stack structure in the vertical direction and a second portion that extends upward from the first portion; a first material layer disposed on the stack structure and the channel structure and having first conductivity; and a second material layer disposed between the first material layer and the stack structure and having second conductivity., The first material layer overlaps second portions of the channel structures in the vertical direction, and the second material layer does not overlap the second portions of the channel structures in the vertical direction.
    Type: Application
    Filed: May 10, 2024
    Publication date: February 20, 2025
    Inventors: Changhee Lee, Chulmin Choi, Sangyong Park, Dajin Kim, Taeho Kim, Gunwook Yoon, Taehun Kim, Seungjae Baik, Jaeduk Lee
  • Patent number: 12224277
    Abstract: A memory device includes first and second semiconductor layers. The first semiconductor layer includes wordlines and bitlines, an upper substrate, and a memory cell array. The memory cell array includes a memory blocks. The second semiconductor layer includes a lower substrate, and an address decoder. Each memory block includes a core region including a memory cells, a first extension region adjacent to a first side of the core region and including a plurality of wordline contacts, and a second extension region adjacent to a second side of the core region and including an insulating mold structure. The second extension region includes step zones and at least one flat zone. Through-hole vias penetrating the insulating mold structure are in the flat zone. The wordlines and the address decoder are electrically connected with each other by at least the through-hole vias.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: February 11, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yonghyuk Choi, Bongsoon Lim, Hongsoo Jeon, Jaeduk Yu
  • Publication number: 20240024426
    Abstract: A method for lowering blood pressure is disclosed. The method includes administering a pharmaceutical composition to a subject in need thereof, wherein the composition contains a pharmaceutically acceptable excipient; and a peptide having an amino acid sequence of any one of SEQ ID NOS: 1 to 102. The peptide is in a form of a long-acting conjugate.
    Type: Application
    Filed: August 17, 2021
    Publication date: January 25, 2024
    Applicant: HANMI PHARM. CO., LTD.
    Inventors: Seungjae BAEK, Jaeduk CHOI, Wonjung SHIN, Jung Kuk KIM, Jong Suk LEE, Jae Hyuk CHOI, Euh Lim OH
  • Publication number: 20230302148
    Abstract: Provided are a pharmaceutical composition including a long-acting conjugate of a triple agonist as an active ingredient and a method of treating obesity and/or a non-alcoholic fatty liver disease using the same. The pharmaceutical composition including the long-acting conjugate of the triple agonist of the present invention may be stably applied to treatment of obesity and/or a non-alcoholic fatty liver disease without side effects according to therapeutic effects on obesity and/or the non-alcoholic fatty liver disease.
    Type: Application
    Filed: August 13, 2021
    Publication date: September 28, 2023
    Applicant: HANMI PHARM. CO., LTD.
    Inventors: Seungjae BAEK, Jaeduk CHOI, Wonjung SHIN, Jung Kuk KIM