Abstract: The present invention relates to a method for selectively separating propylene carbonate by adding water to reaction products comprising a polyether carbonate polyol and propylene carbonate, which are generated from a polymerization reaction of propylene oxide and carbon dioxide under a double metal cyanide (DMC) catalyst, wherein an economical and effective separation of propylene carbonate can be achieved.

Abstract: The present invention relates to a double metal cyanide catalyst comprising a polyether compound, a metal salt, a metal cyanide salt, and an organic complexing agent having an acetate group or a tartrate group; a preparation method therefor; and a method for preparing a polycarbonate polyether polyol by copolymerizing carbon dioxide and an epoxy compound in the presence of the catalyst. According to the present invention, the double metal cyanide catalyst has excellent in catalytic activity and has a short catalytic activity induction time, according to an embodiment of the present invention, the process for preparing the catalyst of the present invention is eco-friendly and simple in process, since an amount of the organic complexing agent to be used is small, and has a simple process.

Abstract: The present invention relates to a method for selectively separating propylene carbonate by adding water to reaction products comprising a polyether carbonate polyol and propylene carbonate, which are generated from a polymerization reaction of propylene oxide and carbon dioxide under a double metal cyanide (DMC) catalyst, wherein an economical and effective separation of propylene carbonate can be achieved.

Abstract: The present invention relates to a double metal cyanide catalyst comprising a polyether compound, a metal salt, a metal cyanide salt, and an organic complexing agent having an acetate group or a tartrate group; a preparation method therefor; and a method for preparing a polycarbonate polyether polyol by copolymerizing carbon dioxide and an epoxy compound in the presence of the catalyst. According to the present invention, the double metal cyanide catalyst has excellent in catalytic activity and has a short catalytic activity induction time, according to an embodiment of the present invention, the process for preparing the catalyst of the present invention is eco-friendly and simple in process, since an amount of the organic complexing agent to be used is small, and has a simple process.

Abstract: The present invention relates to a diffusion barrier layer for a semiconductor device and fabrication method thereof. The diffusion barrier layer according to the present invention is fabricated by forming a diffusion barrier layer containing a refractory metal material and an insulating material on an insulating layer and in a contact hole, wherein the insulating layer being partially etched to form the contact hole, is formed on a semiconductor substrate; and annealing the diffusion barrier layer. Therefore, an object of the present invention is to provide a diffusion barrier layer for a semiconductor device, which is of an amorphous or microcrystalline state and thermodynamically stable even at a high temperature since an insulating material is bonded to a refractory metal material in the diffusion barrier layer.

Abstract: The present invention relates to a method of forming a conductive layer and an electroplating device, and in particular, to a method of forming a conductive layer that provides an electrically-conductive layer having both characteristics of increased adhesiveness to an electroplated body and increased uniformity. The electroplating apparatus and method can produce supersonic waves for electroplating. Thus, the electroplating device can include a wave generator. The electroplating device can further include a plating bath filled with an electrolyte solution that can propagate super sonic waves, a power supply, a plated body connected electrically to a first terminal of the power supply, and a plating body connected electrically to a second terminal of the power supply where the plating body provides ions the same as dissolved in the electrolyte solution to maintain a desired concentration of dissolved ions.

Abstract: A computer simulation method for a semiconductor device manufacturing process, includes: a first step for forming an initial section of the material with only open cells exposed to the growth or etching among the cells; a second step for inputting information including growth or etching points into each open cell; a third step for computing a movement speed for the growth or etching points; a fourth step for moving the growth or etching points for a time determined according to the movement speed; and a fifth step for forming a new etching section by re-arranging the open cells exposed to the growth or etching, after moving the growth or etching points, the second to fifth steps being repeatedly performed on the re-arranged open cells until the sum of the predetermined time reaches the time (T).

Abstract: The present invention relates to a diffusion barrier layer for a semiconductor device and fabrication method thereof. The diffusion barrier layer according to the present invention is fabricated by forming a diffusion barrier layer containing a refractory metal material and an insulating material on an insulating layer and in a contact hole, wherein the insulating layer being partially etched to form the contact hole, is formed on a semiconductor substrate; and annealing the diffusion barrier layer. Therefore, an object of the present invention is to provide a diffusion barrier layer for a semiconductor device, which is of an amorphous or microcrystalline state and thermodynamically stable even at a high temperature since an insulating material is bonded to a refractory metal material in the diffusion barrier layer.

Abstract: The present invention relates to a diffusion barrier layer for a semiconductor device and fabrication method thereof. The diffusion barrier layer according to the present invention is fabricated by forming a diffusion barrier layer containing a refractory metal material and an insulating material on an insulating layer and in a contact hole, wherein the insulating layer being partially etched to form the contact hole, is formed on a semiconductor substrate; and annealing the diffusion barrier layer. Therefore, an object of the present invention is to provide a diffusion barrier layer for a semiconductor device, which is of an amorphous or microcrystalline state and thermodynamically stable even at a high temperature since an insulating material is bonded to a refractory metal material in the diffusion barrier layer.

Abstract: A method for forming a dual gate of a semiconductor devices by etching the polysilicon layer as a multi-step, resulting in etching velocities and anisotropic etching profiles for doped polysilicon and undoped polysilicon that are consistent and, since there is no difference in etching selectivity in the following etching step, damage of gate oxide layer by excess etching is prevented.

Abstract: The present invention relates to a method of forming a conductive layer and an electroplating device, and in particular, to a method of forming a conductive layer that provides an electrically-conductive layer having both characteristics of increased adhesiveness to an electroplated body and increased uniformity. The electroplating apparatus and method can produce supersonic waves for electroplating. Thus, the electroplating device can include a wave generator. The electroplating device can further include a plating bath filled with an electrolyte solution that can propagate super sonic waves, a power supply, a plated body connected electrically to a first terminal of the power supply, and a plating body connected electrically to a second terminal of the power supply where the plating body provides ions the same as dissolved in the electrolyte solution to maintain a desired concentration of dissolved ions.

Abstract: The present invention relates to a method of forming a conductive layer and an electroplating device, and in particular, to a method of forming a conductive layer that provides an electrically-conductive layer having both characteristics of increased adhesiveness to an electroplated body and increased uniformity. The electroplating apparatus and method can produce supersonic waves for electroplating. Thus, the electroplating device can include a wave generator. The electroplating device can further include a plating bath filled with an electrolyte solution that can propagate super sonic waves, a power supply, a plated body connected electrically to a first terminal of the power supply, and a plating body connected electrically to a second terminal of the power supply where the plating body provides ions the same as dissolved in the electrolyte solution to maintain a desired concentration of dissolved ions.

Abstract: A plug forming method for a semiconductor device includes the steps of forming an insulation layer in a semiconductor substrate, forming an opening on a predetermined surface portion of the semiconductor substrate, forming a polysilicon layer on the insulation layer including the opening, and etching back the polysilicon layer using a compound gas mixed by a first gas including fluorine, and a second gas including one selected from nitrogen and oxygen. The method decreases the etching loading effect and the plug loss, thereby improving the reliability of the semiconductor device.

Abstract: A dry etching method of a multilayer film for a semiconductor device includes a first step for etching a metallic layer or a metallic silicide layer by use of a compound gas plasma mixed by a first gas including at least two of O.sub.2, N.sub.2, CO, a second gas including fluorine, a third gas including chlorine, and a fourth gas including bromine, a second step for processing an entire structure formed on the semiconductor substrate by use of a fluorine gas plasma including carbon, and a third step for etching the polysilicon layer by use of a gas plasma including chlorine. The dry etching method prevents an undercut generation along the sidewalls as etching targets, as well as residues remaining in the substrate, thereby improving a reliability of the semiconductor device. The method omits an additional refining process, thereby decreasing a fabrication time of the semiconductor device, improving productivity and realizing cost reduction of the semiconductor device.

Abstract: An interconnection fabricating method for a semiconductor device includes the steps of forming an interconnection layer on a semiconductor substrate, forming a first photoresist layer on the interconnection layer, forming an insulation layer on the first photoresist layer, forming a second photoresist layer pattern on the insulation layer, sequentially etching the insulation layer and the first photoresist layer to obtain an insulation layer pattern and a first photoresist layer pattern, and removing the second photoresist layer pattern, removing the insulation layer pattern using dry etching, and forming an interconnection layer pattern by selectively etching the interconnection layer.

Abstract: A dry etching method for a multilayer film is disclosed, which is capable of dry-etching a multilayer film such as a titanium polyside (a polysilicon layer and a titanium silicide layer) and includes the steps of a first step for anisotropically etching the titanium silicide layer using a plasma containing Cl.sub.2 /N.sub.2 gas, and a second step for anisotropically etching the polysilicon layer using a plasma containing Cl.sub.2 /O.sub.2.

Abstract: A method for restoring an electrostatic chuck force of an electrostatic chuck in a plasma apparatus includes the steps of only supplying a source gas, and applying a source power, but not an RF bias, to the plasma apparatus to induce a positive plasma. The positive plasma discharges any accumulated negative charge on the electrostatic chuck.

Abstract: A method for forming a semiconductor device contact plug in a contact hole without a plug cavity. The method forms a contact hole on a substrate, and then forms a barrier layer in the contact hole. Next, a contact plug is formed on the barrier layer in the contact hole. After the formation of the contact plug, a portion of the barrier layer is selectively removed using a gas mixture of a first gas and a second gas. The first gas etches the barrier layer, and the second gas forms a protective layer to prevent a cavity from forming.