Abstract: A photomask blank includes a hard mask having an excellent etch selectivity with respect to an opaque layer. The photomask blank includes a light-transmissive substrate, an opaque chromium layer disposed on the light-transmissive substrate, and a hard mask layer disposed on the opaque chromium layer. The hard mask layer is of a conductive material having an etch selectivity of at least 3:1 with respect to the opaque chromium layer against an etch gas mixture including chlorine gas and oxygen gas. Also, a resist layer is disposed on the hard mask layer. Alternatively, a phase shift layer can be interposed between the light-transmissive substrate and the opaque chromium layer. Preferably, the hard mask layer is formed of Mo or MoSi. First, the resist layer is patterned, and the hard mask is etched using the patterned resist as an etch mask. Then the chromium layer is etched using the patterned hard mask as an etch mask.

Abstract: According to some embodiments, a gate electrode structure including a gate electrode stack and a spacer, and source/drain region are formed on a semiconductor substrate. A first interlayer insulating layer having a thickness greater than that of the gate electrode structure is formed on the semiconductor substrate. On the first interlayer insulating layer, an etch inducing and focusing mask extending in a same direction as a length direction of the gate electrode structure and covering the gate electrode structure is formed. A second interlayer insulating layer is formed on the first interlayer insulating layer. A photoresist pattern is formed on the second interlayer insulating layer. The second interlayer insulating layer and the first interlayer insulating layer are sequentially etched using the photoresist pattern as an etch mask, thereby forming a SAC hole. A conductive material is used to fill in the SAC hole to form a SAC pad.

Abstract: According to some embodiments, a gate electrode structure including a gate electrode stack and a spacer, and source/drain region are formed on a semiconductor substrate. A first interlayer insulating layer having a thickness greater than that of the gate electrode structure is formed on the semiconductor substrate. On the first interlayer insulating layer, an etch inducing and focusing mask extending in a same direction as a length direction of the gate electrode structure and covering the gate electrode structure is formed. A second interlayer insulating layer is formed on the first interlayer insulating layer. A photoresist pattern is formed on the second interlayer insulating layer. The second interlayer insulating layer and the first interlayer insulating layer are sequentially etched using the photoresist pattern as an etch mask, thereby forming a SAC hole. A conductive material is used to fill in the SAC hole to form a SAC pad.

Abstract: A photomask blank includes a hard mask having an excellent etch selectivity with respect to an opaque layer. The photomask blank includes a light-transmissive substrate, an opaque chromium layer disposed on the light-transmissive substrate, and a hard mask layer disposed on the opaque chromium layer. The hard mask layer is of a conductive material having an etch selectivity of at least 3:1 with respect to the opaque chromium layer against an etch gas mixture including chlorine gas and oxygen gas. Also, a resist layer is disposed on the hard mask layer. Alternatively, a phase shift layer can be interposed between the light-transmissive substrate and the opaque chromium layer. Preferably, the hard mask layer is formed of Mo or MoSi. First, the resist layer is patterned, and the hard mask is etched using the patterned resist as an etch mask. Then the chromium layer is etched using the patterned hard mask as an etch mask.

Abstract: A method of manufacturing semiconductor device that improves the alignment margin between a contact hole and a device pattern includes a layer having an upper vertically shaped portion and a lower symmetrically inclined shaped portion. That is, the lower portion is tapered.