Patents by Inventor Jae-hee Hwang

Jae-hee Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974433
    Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.
    Type: Grant
    Filed: January 14, 2022
    Date of Patent: April 30, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-Heon Kang, Tae Hun Kim, Jae Ryong Sim, Kwang Young Jung, Gi Yong Chung, Jee Hoon Han, Doo Hee Hwang
  • Publication number: 20240121543
    Abstract: An electronic device according to various embodiments of the present invention may comprise: a housing comprising a first surface facing in a first direction and a second surface facing in a second direction that is opposite to the first direction, the first surface comprising an at least partially transparent part and at least one opening formed adjacent to the at least partially transparent part; a camera positioned inside the housing, the camera comprising an image sensor facing in the first direction through the at least partially transparent part of the housing; and an acoustic component arranged between the first surface and the second surface, the acoustic component comprising a vibration plate configured to generate a sound such that the same moves in at least one direction selected from the first and second directions, a first passage formed in a third direction that is substantially perpendicular to the first direction such that the generated sound passes through the same, and a second passage forme
    Type: Application
    Filed: November 13, 2023
    Publication date: April 11, 2024
    Inventors: Young-Bae PARK, Byoung-Hee LEE, Jae-Hee YOU, Tae-Eon KIM, Han-Bom PARK, Sun-Young LEE, Byoung-Uk YOON, Kyung-Hee LEE, Ho-Chul HWANG
  • Publication number: 20240120323
    Abstract: The present disclosure relates to an apparatus for fabricating a display panel including: an attachment member having a fixing portion in a pressurization direction to which a pressurization header is fixed, an attachment driving member configured to move the attachment member and the pressurization header in the pressurization direction or a detachment direction through a fixing frame of the attachment member, a first pressure sensing module between the pressurization header and the attachment member and configured to generate first pressure detection signals according to pressure applied to the pressurization header, a gradient setting module configured to set a gradient of the pressurization header based on magnitudes of the first pressure detection signals, and a gradient control module configured to adjust gradients of the pressurization header, the attachment member, and the fixing frame according to control of the gradient setting module.
    Type: Application
    Filed: September 6, 2023
    Publication date: April 11, 2024
    Inventors: Tae Hee LEE, Sung Kook PARK, Kyung Ho KIM, Young Seok SEO, Jae Gwang UM, Sang Hyun LEE, Hyung Suk HWANG
  • Publication number: 20240092228
    Abstract: A seat for a vehicle, includes a second row center seat and a second row side seat provided on a partition wall positioned rearward of a driver seat, the second row center seat may move leftward or rightward, and an interval between the seats may be increased in a state in which the second row center seat is moved in a right direction away from the second row side seat, which makes it possible to maximally prevent body contact between a passenger in the second row center seat and a passenger in the second row side seat.
    Type: Application
    Filed: January 20, 2023
    Publication date: March 21, 2024
    Applicants: Hyundai Motor Company, Kia Corporation, Hyundai Transys Inc.
    Inventors: Jung Sang YOU, Yong Chul Kim, Dae Hee Lee, Eun Sue Kim, Jae Hoon Cho, Han Kyung Park, Jae Sung Shin, Hae Dong Kwak, Jun Sik Hwang, Gwon Hwa Bok
  • Patent number: 11932140
    Abstract: Disclosed is a cushion tip-up type seat for a vehicle. The cushion tip-up type seat for a vehicle is configured to perform a tip-up function of a cushion part, and to move a seat leftward and rightward to adjust an interval between left and right seats, whereby left and right spacing between occupants seated in the seats is sufficiently secured and the convenience of the occupants is improved.
    Type: Grant
    Filed: July 13, 2022
    Date of Patent: March 19, 2024
    Assignees: Hyundai Motor Company, Kia Corporation, Hyundai Transys Inc.
    Inventors: Dong Woo Jeong, Eun Sue Kim, Dae Hee Lee, Myung Hoe Kim, Jun Sik Hwang, Gwon Hwa Bok, Hae Dong Kwak, Jae Sung Shin, Han Kyung Park, Jae Hoon Cho
  • Publication number: 20240067056
    Abstract: The present disclosure relates to a vehicle rear seat including: a center seat; and side seats located on the left and right of the center seat, wherein, the center seat is capable of protruding by moving the center seat forward with respect to the side seats, and in the state in which the center seat protrudes forward, it is possible to increase an inter-passenger distance so that physical contact between the passenger of the center seat and the passenger of each of the side seats can be prevented as much as possible.
    Type: Application
    Filed: March 6, 2023
    Publication date: February 29, 2024
    Inventors: Jung Sang You, Yong Chul Kim, Dae Hee Lee, Eun Sue Kim, Jae Hoon Cho, Han Kyung Park, Jae Sung Shin, Hae Dong Kwak, Jun Sik Hwang, Gwon Hwa Bok
  • Publication number: 20140065828
    Abstract: A process is provided for selective removal of one or more unwanted fins during FINFET device fabrication. In one aspect, the process includes: providing a conformal protective layer over multiple fin structures on a substrate; patterning one or more openings over the unwanted fin structure(s); and removing at least a top portion of the unwanted fin structure(s) exposed through the opening(s), the removing including removing at least a portion of the conformal protective layer over the unwanted fin structure(s) exposed through the opening(s). In enhanced aspects, the removing includes removing a hard mask from the at least one unwanted fin structure(s) exposed through the opening(s), and selectively removing semiconductor material of at least one unwanted fin structure(s). The conformal protective layer protects one or more remaining fin structures during the selective removal of the semiconductor material of the unwanted fin structure(s).
    Type: Application
    Filed: September 5, 2012
    Publication date: March 6, 2014
    Applicant: GLOBALFOUNDRIES, INC.
    Inventors: Dae-Han CHOI, Jae Hee HWANG, Wontae HWANG
  • Patent number: 8658536
    Abstract: A process is provided for selective removal of one or more unwanted fins during FINFET device fabrication. In one aspect, the process includes: providing a conformal protective layer over multiple fin structures on a substrate; patterning one or more openings over the unwanted fin structure(s); and removing at least a top portion of the unwanted fin structure(s) exposed through the opening(s), the removing including removing at least a portion of the conformal protective layer over the unwanted fin structure(s) exposed through the opening(s). In enhanced aspects, the removing includes removing a hard mask from the at least one unwanted fin structure(s) exposed through the opening(s), and selectively removing semiconductor material of at least one unwanted fin structure(s). The conformal protective layer protects one or more remaining fin structures during the selective removal of the semiconductor material of the unwanted fin structure(s).
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: February 25, 2014
    Assignee: Globalfoundries Inc.
    Inventors: Dae-Han Choi, Jae Hee Hwang, Wontae Hwang
  • Patent number: 7371484
    Abstract: A photomask blank includes a hard mask having an excellent etch selectivity with respect to an opaque layer. The photomask blank includes a light-transmissive substrate, an opaque chromium layer disposed on the light-transmissive substrate, and a hard mask layer disposed on the opaque chromium layer. The hard mask layer is of a conductive material having an etch selectivity of at least 3:1 with respect to the opaque chromium layer against an etch gas mixture including chlorine gas and oxygen gas. Also, a resist layer is disposed on the hard mask layer. Alternatively, a phase shift layer can be interposed between the light-transmissive substrate and the opaque chromium layer. Preferably, the hard mask layer is formed of Mo or MoSi. First, the resist layer is patterned, and the hard mask is etched using the patterned resist as an etch mask. Then the chromium layer is etched using the patterned hard mask as an etch mask.
    Type: Grant
    Filed: August 9, 2004
    Date of Patent: May 13, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jeong-yun Lee, Ka-soon Yim, Jae-hee Hwang, Il-yong Jang
  • Patent number: 7253099
    Abstract: According to some embodiments, a gate electrode structure including a gate electrode stack and a spacer, and source/drain region are formed on a semiconductor substrate. A first interlayer insulating layer having a thickness greater than that of the gate electrode structure is formed on the semiconductor substrate. On the first interlayer insulating layer, an etch inducing and focusing mask extending in a same direction as a length direction of the gate electrode structure and covering the gate electrode structure is formed. A second interlayer insulating layer is formed on the first interlayer insulating layer. A photoresist pattern is formed on the second interlayer insulating layer. The second interlayer insulating layer and the first interlayer insulating layer are sequentially etched using the photoresist pattern as an etch mask, thereby forming a SAC hole. A conductive material is used to fill in the SAC hole to form a SAC pad.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: August 7, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hee Hwang, Jeong-Yun Lee, Tae-Ryong Kim, Yong-Hyeon Park
  • Publication number: 20050101127
    Abstract: According to some embodiments, a gate electrode structure including a gate electrode stack and a spacer, and source/drain region are formed on a semiconductor substrate. A first interlayer insulating layer having a thickness greater than that of the gate electrode structure is formed on the semiconductor substrate. On the first interlayer insulating layer, an etch inducing and focusing mask extending in a same direction as a length direction of the gate electrode structure and covering the gate electrode structure is formed. A second interlayer insulating layer is formed on the first interlayer insulating layer. A photoresist pattern is formed on the second interlayer insulating layer. The second interlayer insulating layer and the first interlayer insulating layer are sequentially etched using the photoresist pattern as an etch mask, thereby forming a SAC hole. A conductive material is used to fill in the SAC hole to form a SAC pad.
    Type: Application
    Filed: September 30, 2004
    Publication date: May 12, 2005
    Inventors: Jae-Hee Hwang, Jeong-Yun Lee, Tae-Ryong Kim, Yong-Hyeon Park
  • Publication number: 20050042526
    Abstract: A photomask blank includes a hard mask having an excellent etch selectivity with respect to an opaque layer. The photomask blank includes a light-transmissive substrate, an opaque chromium layer disposed on the light-transmissive substrate, and a hard mask layer disposed on the opaque chromium layer. The hard mask layer is of a conductive material having an etch selectivity of at least 3:1 with respect to the opaque chromium layer against an etch gas mixture including chlorine gas and oxygen gas. Also, a resist layer is disposed on the hard mask layer. Alternatively, a phase shift layer can be interposed between the light-transmissive substrate and the opaque chromium layer. Preferably, the hard mask layer is formed of Mo or MoSi. First, the resist layer is patterned, and the hard mask is etched using the patterned resist as an etch mask. Then the chromium layer is etched using the patterned hard mask as an etch mask.
    Type: Application
    Filed: August 9, 2004
    Publication date: February 24, 2005
    Inventors: Jeong-yun Lee, Ka-soon Yim, Jae-hee Hwang, Il-yong Jang
  • Patent number: 6204191
    Abstract: A method of manufacturing semiconductor device that improves the alignment margin between a contact hole and a device pattern includes a layer having an upper vertically shaped portion and a lower symmetrically inclined shaped portion. That is, the lower portion is tapered.
    Type: Grant
    Filed: June 16, 1999
    Date of Patent: March 20, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kwang-Jin Jung, Tae-ryong Kim, Chung-howan Kim, Jae-hee Hwang