Patents by Inventor Jae-hee Hwang
Jae-hee Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250214805Abstract: A reel take-out device and method is provided, in which a reel may be taken out in response to an arrangement angle of a shaft of a transport cart to prevent the reel from being damaged during a take-out process and to increase take-out workability. The reel take-out device comprises a gripper unit gripping a reel core of one or more reels sequentially fitted to a shaft of a transport cart; a first driving unit connected to the gripper unit to elevate the gripper unit in a first direction; a second driving unit connected to the first driving unit to move the first driving unit in a second direction; and a controller controlling driving of the gripper unit, the first driving unit and the second driving unit, wherein the controller controls the first and second driving units to be simultaneously driven to take out the reel in response to an arrangement angle of the shaft along the second direction in a state that the gripper unit grips the reel core.Type: ApplicationFiled: December 26, 2024Publication date: July 3, 2025Inventors: Jae Hee HWANG, Seung Won KIM
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Publication number: 20240199348Abstract: Disclosed is an apparatus for transferring an article, the apparatus including: a vehicle moving along a moving rail installed on a ceiling; a main body connected to the vehicle and providing an interior space in which an article is located; a hoist module provided in the main body, and for hoisting a belt by winding or unwinding the belt; a hand unit fixed at one end of the belt and for gripping the article; and a drop preventing member provided in the main body, and for preventing the article from dropping during moving of the vehicle, in which the drop preventing member includes support pins provided at different heights depending on types of article.Type: ApplicationFiled: December 15, 2023Publication date: June 20, 2024Inventors: Hyun Jun LEE, Jae Hee HWANG, Seon Jung KIM, Tae Hyun JO
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Publication number: 20140065828Abstract: A process is provided for selective removal of one or more unwanted fins during FINFET device fabrication. In one aspect, the process includes: providing a conformal protective layer over multiple fin structures on a substrate; patterning one or more openings over the unwanted fin structure(s); and removing at least a top portion of the unwanted fin structure(s) exposed through the opening(s), the removing including removing at least a portion of the conformal protective layer over the unwanted fin structure(s) exposed through the opening(s). In enhanced aspects, the removing includes removing a hard mask from the at least one unwanted fin structure(s) exposed through the opening(s), and selectively removing semiconductor material of at least one unwanted fin structure(s). The conformal protective layer protects one or more remaining fin structures during the selective removal of the semiconductor material of the unwanted fin structure(s).Type: ApplicationFiled: September 5, 2012Publication date: March 6, 2014Applicant: GLOBALFOUNDRIES, INC.Inventors: Dae-Han CHOI, Jae Hee HWANG, Wontae HWANG
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Patent number: 8658536Abstract: A process is provided for selective removal of one or more unwanted fins during FINFET device fabrication. In one aspect, the process includes: providing a conformal protective layer over multiple fin structures on a substrate; patterning one or more openings over the unwanted fin structure(s); and removing at least a top portion of the unwanted fin structure(s) exposed through the opening(s), the removing including removing at least a portion of the conformal protective layer over the unwanted fin structure(s) exposed through the opening(s). In enhanced aspects, the removing includes removing a hard mask from the at least one unwanted fin structure(s) exposed through the opening(s), and selectively removing semiconductor material of at least one unwanted fin structure(s). The conformal protective layer protects one or more remaining fin structures during the selective removal of the semiconductor material of the unwanted fin structure(s).Type: GrantFiled: September 5, 2012Date of Patent: February 25, 2014Assignee: Globalfoundries Inc.Inventors: Dae-Han Choi, Jae Hee Hwang, Wontae Hwang
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Patent number: 7371484Abstract: A photomask blank includes a hard mask having an excellent etch selectivity with respect to an opaque layer. The photomask blank includes a light-transmissive substrate, an opaque chromium layer disposed on the light-transmissive substrate, and a hard mask layer disposed on the opaque chromium layer. The hard mask layer is of a conductive material having an etch selectivity of at least 3:1 with respect to the opaque chromium layer against an etch gas mixture including chlorine gas and oxygen gas. Also, a resist layer is disposed on the hard mask layer. Alternatively, a phase shift layer can be interposed between the light-transmissive substrate and the opaque chromium layer. Preferably, the hard mask layer is formed of Mo or MoSi. First, the resist layer is patterned, and the hard mask is etched using the patterned resist as an etch mask. Then the chromium layer is etched using the patterned hard mask as an etch mask.Type: GrantFiled: August 9, 2004Date of Patent: May 13, 2008Assignee: Samsung Electronics Co., Ltd.Inventors: Jeong-yun Lee, Ka-soon Yim, Jae-hee Hwang, Il-yong Jang
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Patent number: 7253099Abstract: According to some embodiments, a gate electrode structure including a gate electrode stack and a spacer, and source/drain region are formed on a semiconductor substrate. A first interlayer insulating layer having a thickness greater than that of the gate electrode structure is formed on the semiconductor substrate. On the first interlayer insulating layer, an etch inducing and focusing mask extending in a same direction as a length direction of the gate electrode structure and covering the gate electrode structure is formed. A second interlayer insulating layer is formed on the first interlayer insulating layer. A photoresist pattern is formed on the second interlayer insulating layer. The second interlayer insulating layer and the first interlayer insulating layer are sequentially etched using the photoresist pattern as an etch mask, thereby forming a SAC hole. A conductive material is used to fill in the SAC hole to form a SAC pad.Type: GrantFiled: September 30, 2004Date of Patent: August 7, 2007Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-Hee Hwang, Jeong-Yun Lee, Tae-Ryong Kim, Yong-Hyeon Park
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Publication number: 20050101127Abstract: According to some embodiments, a gate electrode structure including a gate electrode stack and a spacer, and source/drain region are formed on a semiconductor substrate. A first interlayer insulating layer having a thickness greater than that of the gate electrode structure is formed on the semiconductor substrate. On the first interlayer insulating layer, an etch inducing and focusing mask extending in a same direction as a length direction of the gate electrode structure and covering the gate electrode structure is formed. A second interlayer insulating layer is formed on the first interlayer insulating layer. A photoresist pattern is formed on the second interlayer insulating layer. The second interlayer insulating layer and the first interlayer insulating layer are sequentially etched using the photoresist pattern as an etch mask, thereby forming a SAC hole. A conductive material is used to fill in the SAC hole to form a SAC pad.Type: ApplicationFiled: September 30, 2004Publication date: May 12, 2005Inventors: Jae-Hee Hwang, Jeong-Yun Lee, Tae-Ryong Kim, Yong-Hyeon Park
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Publication number: 20050042526Abstract: A photomask blank includes a hard mask having an excellent etch selectivity with respect to an opaque layer. The photomask blank includes a light-transmissive substrate, an opaque chromium layer disposed on the light-transmissive substrate, and a hard mask layer disposed on the opaque chromium layer. The hard mask layer is of a conductive material having an etch selectivity of at least 3:1 with respect to the opaque chromium layer against an etch gas mixture including chlorine gas and oxygen gas. Also, a resist layer is disposed on the hard mask layer. Alternatively, a phase shift layer can be interposed between the light-transmissive substrate and the opaque chromium layer. Preferably, the hard mask layer is formed of Mo or MoSi. First, the resist layer is patterned, and the hard mask is etched using the patterned resist as an etch mask. Then the chromium layer is etched using the patterned hard mask as an etch mask.Type: ApplicationFiled: August 9, 2004Publication date: February 24, 2005Inventors: Jeong-yun Lee, Ka-soon Yim, Jae-hee Hwang, Il-yong Jang
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Patent number: 6204191Abstract: A method of manufacturing semiconductor device that improves the alignment margin between a contact hole and a device pattern includes a layer having an upper vertically shaped portion and a lower symmetrically inclined shaped portion. That is, the lower portion is tapered.Type: GrantFiled: June 16, 1999Date of Patent: March 20, 2001Assignee: Samsung Electronics Co., Ltd.Inventors: Kwang-Jin Jung, Tae-ryong Kim, Chung-howan Kim, Jae-hee Hwang