Patents by Inventor Jae Heon Kim
Jae Heon Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240145719Abstract: A binder solution for an all-solid-state battery, an electrode slurry for an all-solid-state battery including the same and a method of manufacturing an all-solid-state battery using the same, and more particularly to a binder solution for an all-solid-state battery, in which a polymer binder configured such that a non-polar functional group is bonded to the end of a polar functional group is used, whereby the polar functional group is provided by a deprotection mechanism of the polymer binder through a thermal treatment, thus increasing adhesion between electrode materials to thereby improve battery capacity and enabling a wet process to thereby reduce manufacturing costs, an electrode slurry for an all-solid-state battery including the same and a method of manufacturing an all-solid-state battery using the same.Type: ApplicationFiled: January 10, 2024Publication date: May 2, 2024Applicants: HYUNDAI MOTOR COMPANY, Kia Corporation, Seoul National University R&DB FoundationInventors: Sang Mo Kim, Sang Heon Lee, Yong Sub Yoon, Jae Min Lim, Ju Yeong Seong, Jin Soo Kim, Jang Wook Choi, Kyu Lin Lee, Ji Eun Lee
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Patent number: 11974433Abstract: A semiconductor memory device includes a third insulating pattern and a first insulating pattern on a substrate, the third insulating pattern and the first insulating pattern being spaced apart from each other in a first direction that is perpendicular to the substrate such that a bottom surface of the third insulating pattern and a top surface of the first insulating pattern face each other, a gate electrode between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and including a first side extending between the bottom surface of the third insulating pattern and the top surface of the first insulating pattern, and a second insulating pattern that protrudes from the first side of the gate electrode by a second width in a second direction, the second direction being different from the first direction.Type: GrantFiled: January 14, 2022Date of Patent: April 30, 2024Assignee: Samsung Electronics Co., Ltd.Inventors: Joo-Heon Kang, Tae Hun Kim, Jae Ryong Sim, Kwang Young Jung, Gi Yong Chung, Jee Hoon Han, Doo Hee Hwang
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Publication number: 20240132922Abstract: The present invention relates to a chemical and biological integrated degradation process for PET, for recycling PET, and, more specifically, the present invention provides a PET upcycling technique for producing a high-value product via a chemical pretreatment process of PET, a TPA and EG production process using an enzyme, and a process for converting TPA and EG to PCA and GLA, respectively.Type: ApplicationFiled: February 25, 2022Publication date: April 25, 2024Applicant: Korea University Research and Business FoundationInventors: Kyoung Heon KIM, Dong Hyun KIM, Jae Kyun KIM, Dong Oh HAN
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Patent number: 11958377Abstract: A vehicle diagnosis system, an apparatus therefor, and a method therefore are provided. The vehicle diagnosis system includes a wireless charging station that transmits a message including information related to a supportable service type and information related to a vendor of a supportable vehicle and a vehicle that identifies the message and connect a diagnosis session for diagnosing and reprogramming the vehicle. The diagnosis session is performed when a connection for a wireless charging session of the vehicle is established.Type: GrantFiled: July 26, 2021Date of Patent: April 16, 2024Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION, YURA CORPORATION CO., LTD.Inventors: In Sun Oh, Kwang Hae Ye, Ji Heon Kwon, Joon Hyuk Eom, Jae Hwan Na, Yong Ho Kim
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Publication number: 20240105656Abstract: A packaging device including bumps and a method of manufacturing the packaging device are presented. In the method of manufacturing a packaging device, a dielectric layer that covers a packaging base is formed and a lower layer is formed over a packaging base including first and second connecting pads. A plurality of dummy bumps that overlaps with the dielectric layer is formed. A sealing pattern that covers the dummy bumps, filling areas between the dummy bumps, is formed. A lower layer pattern in which the plurality of dummy bumps have been disposed is formed by removing portions of the lower layer that are exposed and do not overlap with the sealing pattern.Type: ApplicationFiled: March 20, 2023Publication date: March 28, 2024Applicant: SK hynix Inc.Inventors: Jae Jun LEE, Jong Yeon KIM, Jong Hoon KIM, Ju Heon YANG, Mi Seon LEE
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Publication number: 20240097119Abstract: A method of manufacturing a composite electrode for an all-solid-state battery includes: preparing a precursor solution by mixing at least one solid electrolyte precursor and at least one polar solvent; stirring the precursor solution; preparing an electrode slurry by adding an active material to the stirred precursor solution; and heat-treating the electrode slurry and obtaining the composite electrode for the all-solid-state battery, wherein the composite electrode for the all-solid-state battery includes: the active material; and a coating layer disposed on the active material and including a solid electrolyte.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Applicants: HYUNDAI MOTOR COMPANY, Kia CorporationInventors: Sun Ho CHOI, Yong Jun JANG, In Woo SONG, Sang Heon LEE, Sang Soo LEE, So Young KIM, Seong Hyeon CHOI, Sa Heum KIM, Jae Min LIM
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Publication number: 20240081393Abstract: A sidestream smoke removal device and a control method thereof are provided. The sidestream smoke removal device according to some embodiments of the present disclosure may include a housing in which a smoking space is formed, an article insertion portion which is disposed at one end of the housing and forms an opening for insertion of a smoking article into the smoking space, an ignition portion which is configured to ignite the smoking article inserted into the smoking space, a sidestream smoke processing portion which is configured to process sidestream smoke generated from the smoking article inserted into the smoking space, and a heating portion disposed inside the housing to heat the smoking space. The heating portion may heat the smoking space to remove a smell generated due to by-products of smoking, and accordingly, the cleanliness of the sidestream smoke removal device can be improved.Type: ApplicationFiled: July 11, 2022Publication date: March 14, 2024Applicant: KT&G CORPORATIONInventors: Seung Kyu HAN, Jin Won PARK, Jae Hyun KIM, Tae Heon KIM
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Publication number: 20240079413Abstract: A complementary thin film transistor (TFT) includes a substrate and a first TFT and a second TFT disposed on the substrate, wherein a first conductive semiconductor layer of the first TFT and a second gate electrode layer of the second TFT are disposed in the same layer and include the same material.Type: ApplicationFiled: August 31, 2023Publication date: March 7, 2024Inventors: Himchan OH, Jong-Heon YANG, Ji Hun CHOI, Seung Youl KANG, Yong Hae KIM, Jeho NA, Jaehyun MOON, Chan Woo PARK, Sung Haeng CHO, Jae-Eun PI, Chi-Sun HWANG
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Patent number: 11919999Abstract: Provided are a method for preparing a polyetherketoneketone and a polyetherketoneketone prepared thereby, wherein, at the time of a polymerization reaction, nitrogen gas is blown into a liquid reaction medium while stirring, thereby quickly removing hydrochloric acid, which is a by-product generated during the reaction, and preventing aggregation of resin particles, thus suppressing the generation of scales.Type: GrantFiled: November 16, 2018Date of Patent: March 5, 2024Assignee: HANWHA CHEMICAL CORPORATIONInventors: Kwang Seok Jeong, Min Sung Kim, Jae Heon Kim, Ju Young Park, Cho Hee Ahn, Byeong Hyeon Lee, Sang Hyun Cho
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Publication number: 20220257916Abstract: The microneedle assembly of the present invention includes: a main body (110) opened at one side thereof and including a solution reservoir (111) formed in the opened side thereof; a dispensing unit (120) disposed at the other side of the main body (110) in such a manner as to fluidically communicate with the solution reservoir (111); a needle supports (130) positioned at a front portion of each of the dispensing units (120), and protrudingly formed at the other end of the main body (110); a microneedles (140) engaged with the front end of the needle support (130); and a first solution release flow channel (150) formed to penetrate through a portion extending outwardly from a front end of the dispensing unit (120) to the front end of the needle support (130).Type: ApplicationFiled: February 16, 2022Publication date: August 18, 2022Applicant: GL COMPANY Co., Ltd.Inventors: Seong Ok KIM, Young Sook YOUN, Jae Heon KIM
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Publication number: 20200339750Abstract: Provided are a method for preparing a polyetherketoneketone and a polyetherketoneketone prepared thereby, wherein, at the time of a polymerization reaction, nitrogen gas is blown into a liquid reaction medium while stirring, thereby quickly removing hydrochloric acid, which is a by-product generated during the reaction, and preventing aggregation of resin particles, thus suppressing the generation of scales.Type: ApplicationFiled: November 16, 2018Publication date: October 29, 2020Applicant: HANWHA CHEMICAL CORPORATIONInventors: Kwang Seok JEONG, Min Sung KIM, Jae Heon KIM, Ju Young PARK, Cho Hee AHN, Byeong Hyeon LEE, Sang Hyun CHO
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Patent number: 10777742Abstract: Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.Type: GrantFiled: November 25, 2019Date of Patent: September 15, 2020Assignee: SK hynix Inc.Inventors: Won-Joon Choi, Ki-Seon Park, Cha-Deok Dong, Bo-Mi Lee, Guk-Cheon Kim, Seung-Mo Noh, Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim, Jae-Hong Kim, Yang-Kon Kim, Jong-Koo Lim
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Publication number: 20200098984Abstract: Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.Type: ApplicationFiled: November 25, 2019Publication date: March 26, 2020Inventors: Won-Joon Choi, Ki-Seon Park, Cha-Deok Dong, Bo-Mi Lee, Guk-Cheon Kim, Seung-Mo Noh, Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim, Jae-Hong Kim, Yang-Kon Kim, Jong-Koo Lim
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Publication number: 20200009361Abstract: A micro needle includes: a first base; a second base formed integrally with the top surface of the first base; a needle support formed integrally with the top surface of the second base and leading to a tapered groove penetrating the bottom surface of the first base; and a needle body formed integrally with the center of the top surface of the needle support and having a needle hole leading to the tapered groove. The micro needle allows for low-cost mass production because of the simple structure, and involves applying various drugs by injecting drugs after puncturing the skin.Type: ApplicationFiled: August 30, 2018Publication date: January 9, 2020Applicant: GL.companyInventors: Seong Ok KIM, Yong Sook YOUN, So Min KIM, Jae Heon KIM
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Patent number: 10490741Abstract: Methods, systems, and devices are disclosed for implementing semiconductor memory using variable resistance elements for storing data. In one aspect, an electronic device is provided to comprise a semiconductor memory unit including: a substrate; an interlayer dielectric layer disposed over the substrate; and a variable resistance element including a seed layer formed over the interlayer dielectric layer, a first magnetic layer formed over the seed layer, a tunnel barrier layer formed over the first magnetic layer, and a second magnetic layer formed over the tunnel barrier layer, wherein the seed layer includes a conductive material having a metallic property and an oxygen content of 1% to approximately 10%.Type: GrantFiled: November 16, 2016Date of Patent: November 26, 2019Assignee: SK hynix Inc.Inventors: Won-Joon Choi, Ki-Seon Park, Cha-Deok Dong, Bo-Mi Lee, Guk-Cheon Kim, Seung-Mo Noh, Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim, Jae-Hong Kim, Yang-Kon Kim, Jong-Koo Lim
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Patent number: 10305030Abstract: Electronic devices and systems having semiconductor memory are provided. In one implementation, for example, an electronic device may include a substrate; an under layer disposed over the substrate and including conductive hafnium silicate; a free layer disposed over the under layer and having a variable magnetization direction; a tunnel barrier layer disposed over the free layer; and a pinned layer disposed over the tunnel barrier layer and having a pinned magnetization direction, and wherein the free layer includes: a first ferromagnetic material; a second ferromagnetic material having a coercive force smaller than that of the first ferromagnetic material; and an amorphous spacer interposed between the first ferromagnetic material and the second ferromagnetic material.Type: GrantFiled: January 8, 2018Date of Patent: May 28, 2019Assignee: SK hynix Inc.Inventors: Won-Joon Choi, Ki-Seon Park, Cha-Deok Dong, Bo-Mi Lee, Guk-Cheon Kim, Seung-Mo Noh, Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim, Jae-Hong Kim, Yang-Kon Kim, Jong-Koo Lim, Jeong-Myeong Kim
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Publication number: 20180130945Abstract: Electronic devices and systems having semiconductor memory are provided. In one implementation, for example, an electronic device may include a substrate; an under layer disposed over the substrate and including conductive hafnium silicate; a free layer disposed over the under layer and having a variable magnetization direction; a tunnel barrier layer disposed over the free layer; and a pinned layer disposed over the tunnel barrier layer and having a pinned magnetization direction, and wherein the free layer includes: a first ferromagnetic material; a second ferromagnetic material having a coercive force smaller than that of the first ferromagnetic material; and an amorphous spacer interposed between the first ferromagnetic material and the second ferromagnetic material.Type: ApplicationFiled: January 8, 2018Publication date: May 10, 2018Inventors: Won-Joon Choi, Ki-Seon Park, Cha-Deok Dong, Bo-Mi Lee, Guk-Cheon Kim, Seung-Mo Noh, Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim, Jae-Hong Kim, Yang-Kon Kim, Jong-Koo Lim, Jeong-Myeong Kim
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Patent number: 9865806Abstract: Electronic devices and systems having semiconductor memory are provided. In one implementation, for example, an electronic device may include a substrate; an under layer disposed over the substrate and including conductive hafnium silicate; a free layer disposed over the under layer and having a variable magnetization direction; a tunnel barrier layer disposed over the free layer; and a pinned layer disposed over the tunnel barrier layer and having a pinned magnetization direction, and wherein the free layer includes: a first ferromagnetic material; a second ferromagnetic material having a coercive force smaller than that of the first ferromagnetic material; and an amorphous spacer interposed between the first ferromagnetic material and the second ferromagnetic material.Type: GrantFiled: November 17, 2016Date of Patent: January 9, 2018Assignee: SK hynix Inc.Inventors: Won-Joon Choi, Ki-Seon Park, Cha-Deok Dong, Bo-Mi Lee, Guk-Cheon Kim, Seung-Mo Noh, Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim, Jae-Hong Kim, Yang-Kon Kim, Jong-Koo Lim, Jeong-Myeong Kim
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Publication number: 20170352805Abstract: An electronic device including a semiconductor memory is provided. The semiconductor memory includes an interlayer dielectric layer disposed over a substrate, and having a recess which exposes a portion of the substrate; a bottom contact partially filling the recess; and a resistance variable element including a bottom layer which fills at least a remaining space of the recess over the bottom contact, and a remaining layer which is disposed over the bottom layer and protrudes out of the interlayer dielectric layer.Type: ApplicationFiled: August 25, 2017Publication date: December 7, 2017Inventors: Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim
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Patent number: 9786840Abstract: An electronic device including a semiconductor memory is provided. The semiconductor memory includes an interlayer dielectric layer disposed over a substrate, and having a recess which exposes a portion of the substrate; a bottom contact partially filling the recess; and a resistance variable element including a bottom layer which fills at least a remaining space of the recess over the bottom contact, and a remaining layer which is disposed over the bottom layer and protrudes out of the interlayer dielectric layer.Type: GrantFiled: February 13, 2015Date of Patent: October 10, 2017Assignee: SK hynix Inc.Inventors: Min-Suk Lee, Chan-Sik Park, Jae-Heon Kim, Choi-Dong Kim