Patents by Inventor Jae-hoon Heo
Jae-hoon Heo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12165918Abstract: The disclosed technology generally relates to forming a titanium nitride-based thin films, and more particularly to a conformal and smooth titanium nitride-based thin films and methods of forming the same. In one aspect, a method of forming a thin film comprising one or both of TiSiN or TiAlN comprises exposing a semiconductor substrate to one or more vapor deposition cycles at a pressure in a reaction chamber greater than 1 torr, wherein a plurality of the vapor deposition cycles comprises an exposure to a titanium (Ti) precursor, an exposure to a nitrogen (N) precursor and an exposure to one or both of a silicon (Si) precursor or an aluminum (Al) precursor.Type: GrantFiled: June 10, 2022Date of Patent: December 10, 2024Assignee: Eugenus, Inc.Inventors: Niloy Mukherjee, Hae Young Kim, Jerry Mack, Jae Seok Heo, Sung-Hoon Jung, Somilkumar J. Rathi, Srishti Chugh, Nariman Naghibolashrafi, Yoshikazu Okuyama, Bunsen B. Nie
-
Publication number: 20240383520Abstract: In an operation control method of an integrated control apparatus for an autonomous driving vehicle, when a steering operation is performed on both of a first joystick lever and a second joystick lever to return to neutral positions after the steering operation, a lever which is always pivoted in an adduction direction is set to a function activation state, or a lever set to the function activation state during the steering operation is continuously maintained in the function activation state until the return to the neutral position is completed after the steering operation. In the present way, a user can more easily recognize the joystick lever in the function activation state.Type: ApplicationFiled: November 7, 2023Publication date: November 21, 2024Applicants: Hyundai Motor Company, Kia Corporation, SL CorporationInventors: Jae Wan CHO, Won Jin JEONG, Chun Nyung HEO, Gwang Sun KIM, Yong Woo PARK, Jae Hoon JUNG, Seok Woo YE, Mi Rae DO
-
Publication number: 20240367690Abstract: An integrated operation apparatus for an autonomous vehicle, includes a joystick lever used to accelerate, decelerate, and steer the vehicle, an acceleration and deceleration actuator module and a steering actuator module each include a position sensor module to generate signals related to the acceleration, deceleration, and steering of the vehicle when the joystick lever module is operated, and a torque sensor module is used to feedback control a steering motor during steering operation, realizing more precise steering sensation.Type: ApplicationFiled: November 6, 2023Publication date: November 7, 2024Applicants: Hyundai Motor Company, Kia Corporation, SL CorporationInventors: Jae Wan CHO, Won Jin JEONG, Chun Nyung HEO, Gwang Sun KIM, Yong Woo PARK, Jae Hoon JUNG, Seok Woo YE, Mi Rae DO
-
Publication number: 20240343291Abstract: A method of controlling operation of an integrated control apparatus for autonomous vehicles includes setting one joystick lever touched first by a user between a first joystick lever and a second joystick lever to a function activation state, or setting any one joystick lever with a larger steering operation force to the function activation state at the time of steering the first joystick lever and the second joystick lever together. User fatigue when operating the joystick levers is reduced.Type: ApplicationFiled: September 29, 2023Publication date: October 17, 2024Applicants: Hyundai Motor Company, Kia Corporation, SL CorporationInventors: Jae Wan CHO, Won Jin Jeong, Chun Nyung Heo, Gwang Sun Kim, Yong Woo Park, Jae Hoon Jung, Seok Woo Ye, Mi Rae Do
-
Publication number: 20240338314Abstract: The present technology relates to an electronic device. According to the present technology, a memory controller may include a garbage collection controller and a sustain detector. The garbage collection controller may generate garbage collection information including valid page count values of victim memory blocks on which garbage collection is to be performed among a plurality of memory blocks included in a memory device. The sustain detector in communication with the garbage collection controller may generate sustain information indicating whether random write performance for the memory device is in a sustain state in which a random write performance value related to a capability of the random write performance is greater than or equal to a threshold value based on the garbage collection information.Type: ApplicationFiled: September 19, 2023Publication date: October 10, 2024Inventors: In Sung SONG, Dong Hwan KOO, Ki Tae KIM, Chan Sik KIM, Dong Young SEO, Woong Sik SHIN, In Ho JUNG, Jae Hoon HEO
-
Publication number: 20240330197Abstract: A storage device may generate a compression journal based on N target journals among a plurality of journals and store the compression journal in a memory in which the plurality of journals are stored. In this case, each of the plurality of journals may include a logical address area index, an old physical address area index, and a new physical address area index. The new physical address area indexes of target journals may be the same. In addition, the compression journal may include a new physical address area index common to the target journals.Type: ApplicationFiled: July 19, 2023Publication date: October 3, 2024Inventors: Kwang Hun LEE, In Sung SONG, Chul Woo LEE, Jin Won JANG, Jae Hoon HEO
-
Publication number: 20240329866Abstract: A storage device may set a plurality of super memory blocks each including one or more of the plurality of memory blocks, each including one or more of the plurality of memory units. The storage device may migrate data stored in the first super memory block to a second super memory block among the super memory blocks when a first super memory block among the plurality of super memory blocks satisfies a first condition, and may increase a priority of a target memory unit when the target memory unit among the memory units included in the first super memory block satisfies a second condition.Type: ApplicationFiled: July 20, 2023Publication date: October 3, 2024Inventors: In Sung SONG, Jin Won JANG, Byung Min HA, Jae Hoon HEO
-
Publication number: 20240299247Abstract: A closed-type medicine mixing extraction device for mixing and extracting medicines stored in a first vial and a second vial, respectively, includes a first needle part and a second needle part, which are able to be fitted to the first vial and the second vial, respectively, a connection port to which a syringe is able to be coupled, and a ventilation port through which air is able to enter and exit, wherein the first needle part and the second needle part communicate with each other through a direct communication flow path, the first needle part and the connection port communicate with each other through an extraction flow path, and the second needle part and the ventilation port communicate with each other through a ventilation flow path. Thus, different types of medicines stored in vials, respectively, are able to be hygienically, safely, and rapidly mixed and extracted.Type: ApplicationFiled: April 19, 2023Publication date: September 12, 2024Inventors: JUNG GUN PARK, MAN JIN BANG, JAE HOON HEO
-
Publication number: 20240283000Abstract: Various embodiments of the present invention relate to a secondary battery, and the objective of the present invention is to provide a secondary battery, which has drop-impact resistance, by providing an electrode assembly having a relatively thick inner circumferential and a relatively thin outer circumferential tab. To this end, disclosed is a secondary battery, which comprises an electrode assembly comprising: an anode plate having an inner circumferential tab formed at a wound front end thereof; a separator covering the anode plate; and a cathode plate having an outer circumferential tab formed at a wound distal end thereof.Type: ApplicationFiled: April 29, 2024Publication date: August 22, 2024Inventors: Soo Mi EO, Seung Hee PARK, Jea Woan LEE, Jae Min LIM, Euy Sun JUNG, Kyung Hoon CHO, Young Kwang CHO, Kyeong Yi HEO
-
Publication number: 20240252400Abstract: A multi-vial adapter includes an adapter body including at least two body parts, which are connected to each other at a certain angle, a head part, which protrudes upward from a connection portion between the body parts, and at least two spike parts, which extend downward from the body parts, respectively, at positions spaced a certain distance from the connection portion, and at least two adapter caps which are physically fastened and fixed to the body parts, respectively, and through which the spike parts respectively pass. The adapter body is formed by an injection molding process such that the head part, the body parts, and the spike parts are integrated with each other, and a liquid drug flow path that guides the movement of a liquid drug from the respective spike parts to the head part via the respective body parts may be formed inside the adapter body.Type: ApplicationFiled: November 8, 2022Publication date: August 1, 2024Inventors: Jung Gun PARK, Man Jin BANG, Jae Hoon HEO
-
Publication number: 20220207334Abstract: A neural network device including a convolution static random access memory (SRAM) configured to output a first operation value and a second operation value 1. An accumulation peripheral operator configured to perform an accumulation peripheral operation on the first and the second operation values, a multiplexer array configured to select and output an output value according to a selection signal, a diagonal accumulation SRAM configured to perform a bitwise accumulation of variable weight values and a spatial-wise accumulation operation on an input, a diagonal movement logic, and an addition array operator configured to perform an addition operation of output values of the diagonal movement logic subsequent to a shift operation, the multiplexer array selects any one of an output value of the accumulation peripheral operator and an output value of the addition array operator according to the selection signal and outputs the selected output value to the diagonal accumulation SRAM.Type: ApplicationFiled: August 27, 2021Publication date: June 30, 2022Inventors: Suk Han LEE, Joo-Young KIM, Kyo Min SOHN, Ji Hoon KIM, Jae Hoon HEO
-
Patent number: 9674958Abstract: A printed circuit board includes an in-line PCB region comprising an input/output control region including a first conductive line, and a main PCB region coupled to the in-line PCB region and comprising a semiconductor chip and an input/output signal generation region including a second conductive line. The input/output signal generation region is configured to detect whether or not the first and second conductive lines are electrically connected and to provide an input/output control signal to the semiconductor chip in response to determining whether or not the first and second conductive lines are electrically connected.Type: GrantFiled: January 14, 2015Date of Patent: June 6, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Sang-hun Jeon, Ho-jin Chun, Hyun-seok Cha, Jae-hoon Heo, Young-deok Kim
-
Publication number: 20160011971Abstract: A method of managing a storage area of a memory device in a memory system is provided. A first data is received. The first data has a logical address to be written to the memory device having a plurality of memory blocks. The first data is classified into one of a hot data and a cold data based on an update frequency of the first data. A memory block is defined into a first storage area and a second storage area based on an amount of charge loss of a memory cell in the memory block. A memory cell of the first storage area has charge loss greater than a memory cell of the second storage area. The logical address of the first data is converted to a physical address of the memory device according to a result of the classifying of the first data. The first data is written to a memory cell having the physical address of the memory device.Type: ApplicationFiled: June 26, 2015Publication date: January 14, 2016Inventors: Jae-il LEE, Geun-soo KIM, Jae-hoon HEO, Du-won HONG, Moon-wook OH
-
Publication number: 20150357275Abstract: A printed circuit board includes an in-line PCB region comprising an input/output control region including a first conductive line, and a main PCB region coupled to the in-line PCB region and comprising a semiconductor chip and an input/output signal generation region including a second conductive line. The input/output signal generation region is configured to detect whether or not the first and second conductive lines are electrically connected and to provide an input/output control signal to the semiconductor chip in response to determining whether or not the first and second conductive lines are electrically connected.Type: ApplicationFiled: January 14, 2015Publication date: December 10, 2015Inventors: Sang-hun Jeon, Ho-jin Chun, Hyun-seok Cha, Jae-hoon Heo, Young-deok Kim
-
Publication number: 20150301932Abstract: According to example embodiments, a nonvolatile memory system includes a nonvolatile memory device includes a nonvolatile memory cell array, a temperature sensor configured to measure a temperature of the nonvolatile memory device, and a memory controller configured to adjust an execution frequency of a memory management operation based on a desired (and/or alternatively predetermined) temperature range and the measured temperature.Type: ApplicationFiled: March 23, 2015Publication date: October 22, 2015Inventors: Moon-wook OH, Jae-hoon HEO
-
Patent number: 9122585Abstract: A method for managing data in a storage device includes: receiving a logical page from a host and calculating an actual time stamp of the logical page; finding a block of the storage device in which the logical page is stored and detecting a time stamp of the block and a page offset of the logical page stored in the block; calculating an approximate time stamp of the logical page stored in the block using the time stamp of the block and the page offset; and determining that the logical page is in a first state if the difference between the actual time stamp and the approximate time stamp is smaller than a threshold value, and determining that the logical page is in a second state different from the first state if the difference between the actual time stamp and the approximate time stamp is larger than the threshold value.Type: GrantFiled: November 23, 2012Date of Patent: September 1, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Gyu-Dong Shim, Won-Moon Cheon, Jae-Hoon Heo
-
Patent number: 8582959Abstract: A storage medium which stores catalog information and a catalog information recording and/or playback apparatus and method therefor. Using the method, catalog information including a still picture and additional information together with audio data are recorded on a storage medium such as a digital versatile disk (DVD), which is an optical record storage medium, and the catalog information is played back during playback of the audio data, to thereby provide various information on the audio data. Also, the apparatus includes a buffer memory for catalog playback which maintains a predetermined standard and compatibility, and is capable of real-time reading during playback of the audio data, and automatically plays back the catalog content, corresponding to the playback state of the audio data, when there is no additional selection of a user.Type: GrantFiled: February 8, 2008Date of Patent: November 12, 2013Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-wan Ko, Jung-kwon Heo, Jae-hoon Heo, Jung-seuk Kang
-
Patent number: 8155973Abstract: A lossless encoding and/or decoding apparatus which encodes audio data on a real-time basis includes a lossless compression unit which losslessly compression encodes the audio data stored in an input buffer in units of predetermined data and outputs the encoded data in sequence, and an output buffer which stores the encoded audio data output from the lossless compression unit. A bitrate controller divides a plurality of the encoded audio data stored in the output buffer into first data having a data amount exceeding the maximum bitrate and second data having a data amount less than the maximum bitrate, divides the first data into third data being the encoded audio data having a data amount of the maximum bitrate and fourth data being the encoded data of the portion exceeding the maximum bitrate, and controls the output buffer so that the fourth data is output together with the second data.Type: GrantFiled: June 4, 2010Date of Patent: April 10, 2012Assignee: Samsung Electronics Co., Ltd.Inventor: Jae-Hoon Heo
-
Publication number: 20100241440Abstract: A lossless encoding and/or decoding apparatus which encodes audio data on a real-time basis includes a lossless compression unit which losslessly compression encodes the audio data stored in an input buffer in units of predetermined data and outputs the encoded data in sequence, and an output buffer which stores the encoded audio data output from the lossless compression unit. A bitrate controller divides a plurality of the encoded audio data stored in the output buffer into first data having a data amount exceeding the maximum bitrate and second data having a data amount less than the maximum bitrate, divides the first data into third data being the encoded audio data having a data amount of the maximum bitrate and fourth data being the encoded data of the portion exceeding the maximum bitrate, and controls the output buffer so that the fourth data is output together with the second data.Type: ApplicationFiled: June 4, 2010Publication date: September 23, 2010Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Jae-Hoon HEO
-
Patent number: 7756716Abstract: A lossless encoding and/or decoding apparatus which encodes audio data on a real-time basis includes a lossless compression unit which losslessly compression encodes the audio data stored in an input buffer in units of predetermined data and outputs the encoded data in sequence, and an output buffer which stores the encoded audio data output from the lossless compression unit. A bitrate controller divides a plurality of the encoded audio data stored in the output buffer into first data having a data amount exceeding the maximum bitrate and second data having a data amount less than the maximum bitrate, divides the first data into third data being the encoded audio data having a data amount of the maximum bitrate and fourth data being the encoded data of the portion exceeding the maximum bitrate, and controls the output buffer so that the fourth data is output together with the second data.Type: GrantFiled: January 31, 2008Date of Patent: July 13, 2010Assignee: Samsung Electronics Co., Ltd.Inventor: Jae-Hoon Heo