Abstract: A gate driver including: first to N-th stages receiving first to N-th clock signals from first to N-th clock lines, the first stage includes a first clock terminal receiving the first clock signal, a second clock terminal receiving a second clock signal, a carry terminal receiving a vertical start signal, and an output terminal outputting a first gate signal, an N?K-th stage includes a first clock terminal receiving an N?K-th clock signal, a second clock terminal receiving an N?K+1-th clock signal, a carry terminal receiving an N?K?1-th gate signal, and an output terminal outputting an N?K-th gate signal, and the N-th stage includes a first clock terminal receiving the N-th clock signal, a second clock terminal receiving the first clock signal, a carry terminal receiving an N?1-th gate signal, and an output terminal outputting an N-th gate signal.

Abstract: A display device includes a display panel including a pixel and a driving controller to drive the display panel. The driving controller generates a compensating signal, when a first driving frequency of a first frame is determined as being higher than a second driving frequency of a second frame by comparing a first cycle count value of the first frame with a second cycle count value of the second frame subsequent to the first frame.

Abstract: A pixel includes: a light-emitting element including an anode and a cathode, a first transistor including a first and a second electrode and a gate electrode connected with a first node, a third transistor connected between the second electrode of the first transistor and the first node and including a gate electrode connected with a first scan line, a sixth transistor connected between the second electrode of the first transistor and the anode and including a gate electrode connected with a first emission line, and a seventh transistor connected between the anode and an initialization voltage line and including a gate electrode connected with a second scan line. During an initialization period, the third, sixth, and seventh transistors are turned on such that an initialization voltage from the initialization voltage line is transferred to the gate electrode of the first transistor.

Abstract: A display device includes a display panel that includes a plurality of pixels and displays an image corresponding to each of a plurality of frames, and a drive controller that receives an image signal and drives the plurality of frames at a plurality of driving frequencies. The drive controller includes a representative frequency calculator, a compensation signal calculator, and a data compensation unit that receives an image signal and outputs a compensation data signal by adding a gray of the image signal and a gray value based on a data correction lookup table in which the gray value is stored. Luminance of the image is controlled based on the compensation signal and the compensation data signal.

Abstract: A pixel includes: a light emitting element; a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is to be applied, and a third node electrically connected to the light emitting element; and a bias control transistor configured to be controlled in operating timing thereof by a bias control signal, and configured to switch electrical connection between the second node and a bias power line for transmitting a bias voltage. In one frame period, a voltage level of the bias voltage to be applied to the second node sequentially increases.

Abstract: A display apparatus includes a display panel, a gate driver, a data driver and an emission driver. The display panel includes a pixel. The gate driver is configured to output a gate signal to the pixel. The data driver is configured to output a data voltage to the pixel. The emission driver is configured to output an emission signal to the pixel. The pixel includes a light emitting element, a driving switching element configured to apply a driving current to the light emitting element and a bias switching element configured to apply a bias voltage to the driving switching element. The display apparatus increases a level of the bias voltage when a duration of a light emission time of the pixel is increased.

Abstract: An electronic device includes a display panel which includes a plurality of pixels and displays an image at each of multiple frames, a driving circuit which drives the multiple frames at multiple operating frequencies, a voltage generator which provides a voltage to the display panel, and a drive controller. The drive controller includes a representative frequency calculator which calculates a representative frequency, based on operating frequencies of ‘n’ number of frames before one frame of the multiple frames, and a compensating signal calculator which outputs a compensating signal, based on the representative frequency and a count number in the one frame. The drive controller transmits the compensating signal to the voltage generator, the voltage includes a reference voltage, the voltage generator generates the reference voltage based on the compensating signal, and the voltage generator provides the reference voltage to each of the plurality of pixels.

Abstract: A display device including: a display panel including a pixel; and a panel driver configured to provide a reference voltage and a data voltage to the pixel, wherein the pixel emits light with a luminance corresponding to a difference between the reference voltage and the data voltage, and when the reference voltage changes, and a range of the data voltage is shifted by a voltage level that corresponds to the amount of change in the reference voltage.

Abstract: A pixel includes: a light emitting element; a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is to be applied, and a third node electrically connected to the light emitting element; and a bias control transistor configured to be controlled in operating timing thereof by a bias control signal, and configured to switch electrical connection between the second node and a bias power line for transmitting a bias voltage. In one frame period, a voltage level of the bias voltage to be applied to the second node sequentially increases.

Abstract: A display device includes an on-duty determiner which determines an on-duty period of an emission signal, based on a number of at least one cycle of a current frame, a first compensation value determiner which determines a first compensation value of a bias voltage according to a variation of the on-duty period, a second compensation value determiner which determines a second compensation value of the bias voltage, based on a driving frequency of a previous frame, and a third compensation value determiner which determines a third compensation value, based on the first compensation value and the second compensation value.

Abstract: A driving controller of a display device includes a memory that stores an input image signal in response to a control signal, a scan signal generator outputs an internal scan signal in response to the control signal, and a multiplexer outputs one of the input image signal and a storage image signal as an output image signal in response to the control signal and the internal scan signal. The storage image signal is provided from the memory, and the memory outputs the storage image signal in response to the internal scan signal.

Abstract: A pixel includes: a light-emitting element including an anode and a cathode, a first transistor including a first and a second electrode and a gate electrode connected with a first node, a third transistor connected between the second electrode of the first transistor and the first node and including a gate electrode connected with a first scan line, a sixth transistor connected between the second electrode of the first transistor and the anode and including a gate electrode connected with a first emission line, and a seventh transistor connected between the anode and an initialization voltage line and including a gate electrode connected with a second scan line. During an initialization period, the third, sixth, and seventh transistors are turned on such that an initialization voltage from the initialization voltage line is transferred to the gate electrode of the first transistor.

Abstract: A display device includes a display panel including a plurality of pixels. At least one of the pixel includes a light emitting diode, a first transistor connected between a power line receiving a power source voltage and an anode of the light emitting diode, a second transistor connected between a data line and a first reference node, a first capacitor connected between the power line and the first reference node, a second capacitor connected between the first reference node and a second reference node, a third transistor connected between the first refence node and a reference voltage line receiving a reference voltage, a fourth transistor connected between an initialization voltage line receiving an initialization voltage and a drain of the first transistor, and a fifth transistor connected between the drain of the first transistor and the anode of the light emitting diode.

Abstract: A display device is disclosed that includes a pixel. The pixel includes a first transistor connected between a second node and a third node and including a gate electrode connected to a first node. A first capacitor is formed between the first node and a fourth node. A second capacitor is formed between the fourth node and a first power line. A second transistor is connected between a data line and the fourth node. An eighth transistor is connected between the first power line and the second node. A ninth transistor is connected between the second node and a bias power line. A sixth transistor is connected between the third node and a fifth node. A light emitting element is electrically connected between the fifth node and a second power line. A gate electrode of the eighth transistor and a gate electrode of the sixth transistor are connected to different gate lines.

Abstract: A display device includes: a pixel electrically connected to a data line, a write scan line, an initialization scan line, a compensation scan line, a transmission control line, and an emission control line; a first driving circuit configured to provide a write scan signal to the write scan line and a second driving circuit configured to receive a plurality of clock signals, each of which has a time duration of one unit horizontal period and provide an initialization scan signal, a compensation scan signal, a transmission control signal, and an emission control signal to the initialization scan line, the compensation scan line, the transmission control line, and the emission control line, respectively. Each of the initialization scan signal and the compensation scan signal has an activation interval of one unit horizontal periods or more.

Abstract: A display device includes: a display panel which displays an image corresponding to each of a plurality of frames, and a source driver which drives the display panel. The plurality of frames includes a first frame operating at a first operating frequency, and a second frame operating at a frequency higher than the first operating frequency. The first frame includes a write cycle section, a hold cycle section, and a blank section including a standby section. The source driver operates in a normal driving mode during the write cycle section and the hold cycle section, and operates in a low-power driving mode during the standby section.

Abstract: A pixel connected to a first scan line includes a light-emitting element including an anode and a cathode, a first transistor including a first electrode, a second electrode, and a gate electrode connected to a first node, a first capacitor connected between the first node and a second node, a second transistor connected between the second electrode of the first transistor and the first node including a gate electrode connected to the first scan line, a third transistor including a first electrode, a second electrode connected to the second node, and a gate electrode connected to the first scan line, and a fourth transistor including a first electrode connected to a first driving voltage line, a second electrode connected to the first electrode of the first transistor, and a gate electrode connected to the first scan line.

Abstract: A pixel includes: a light-emitting element including an anode and a cathode, a first transistor including a first and a second electrode and a gate electrode connected with a first node, a third transistor connected between the second electrode of the first transistor and the first node and including a gate electrode connected with a first scan line, a sixth transistor connected between the second electrode of the first transistor and the anode and including a gate electrode connected with a first emission line, and a seventh transistor connected between the anode and an initialization voltage line and including a gate electrode connected with a second scan line. During an initialization period, the third, sixth, and seventh transistors are turned on such that an initialization voltage from the initialization voltage line is transferred to the gate electrode of the first transistor.

Abstract: A pixel includes: a first transistor including a gate electrode electrically connected to a first node, a second node to which a first power voltage for driving the light emitting element is applied, and a third node electrically connected to the light emitting element; a first emission control transistor having an on-off timing controlled by a first emission control signal; and a second emission control transistor having an on-off timing controlled by a second emission control signal. A time interval exists between a time at which the first emission control signal having a turn-on level is input such that a voltage of the second node is dropped from a bias voltage having a voltage level higher than a voltage level of the first power voltage and a time at which the second emission control signal having a turn-on level is input.

Abstract: A display apparatus includes a display panel, a gate driver, a data driver and an emission driver. The display panel includes a pixel. The gate driver is configured to output a gate signal to the pixel. The data driver is configured to output a data voltage to the pixel. The emission driver is configured to output an emission signal to the pixel. The pixel includes a light emitting element, a driving switching element configured to apply a driving current to the light emitting element and a bias switching element configured to apply a bias voltage to the driving switching element. The display apparatus increases a level of the bias voltage when a duration of a light emission time of the pixel is increased.