Patents by Inventor Jae Hyoung Lee
Jae Hyoung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12222070Abstract: The present disclosure relates to a hydrogen tank support apparatus, and the hydrogen tank support apparatus according to the present disclosure includes: a hydrogen storage tank; a frame portion on which the hydrogen storage tank is seated; and a sliding block portion configured to fix a nozzle portion of the hydrogen storage tank to the frame portion, wherein the sliding block portion includes a lower block portion fixed to the frame portion, an upper block portion coupled to the lower block portion in a concave-convex manner so that movement of the hydrogen storage tank is limited in a longitudinal direction and a width direction of the hydrogen storage tank, and a slide ball portion configured to surround an outer side surface of the nozzle portion, interposed between the lower block portion and the upper block portion, and configured to rotatably support the nozzle portion.Type: GrantFiled: October 13, 2021Date of Patent: February 11, 2025Assignee: ILJIN HYSOLUS CO., LTD.Inventors: Jun Young Yim, Seok Jin Lee, Min Uk Park, Hui Chun Kim, Gye Hyoung Yoo, Jae Woo Park, Jun Young Kang
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Patent number: 12212642Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information shared by the core layer signal and the enhanced layer signal, using the time-interleaved signal.Type: GrantFiled: August 15, 2023Date of Patent: January 28, 2025Assignee: Electronics and Telecommunications Research InstituteInventors: Jae-Young Lee, Heung-Mook Kim, Sung-Ik Park, Sun-Hyoung Kwon
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Patent number: 12110281Abstract: Provided is a novel catechol derivative or pharmaceutically acceptable salt thereof having an alkyl moiety substituted with alkylamino and/or a N-alkyl-substituted thiophene-(thio)carboxamide moiety, a process for the preparation thereof, and a pharmaceutical composition including the same.Type: GrantFiled: July 17, 2019Date of Patent: October 8, 2024Assignee: HEXAPHARMATEC CO., LTD.Inventors: Shin Han, Jae-Hyoung Lee
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Publication number: 20230422507Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.Type: ApplicationFiled: September 11, 2023Publication date: December 28, 2023Applicant: SK hynix Inc.Inventor: Jae Hyoung LEE
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Patent number: 11778822Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.Type: GrantFiled: October 19, 2020Date of Patent: October 3, 2023Assignee: SK hynix Inc.Inventor: Jae Hyoung Lee
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Publication number: 20230219908Abstract: Provided are a 2-arylthiazole derivative or pharmaceutically acceptable salt thereof having a specific carboxamide moiety, including a substituted aminoalkyl-carboxamide moiety, a N-containing heterocyclic-alkyl-carboxamide moiety, or a N-containing heterocyclic-carboxamide moiety, a process for the preparation thereof, and a pharmaceutical composition comprising the same.Type: ApplicationFiled: January 15, 2021Publication date: July 13, 2023Applicant: HEXAPHARMATEC CO., LTD.Inventors: Shin HAN, Jae-Hyoung LEE
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Publication number: 20210358943Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.Type: ApplicationFiled: October 19, 2020Publication date: November 18, 2021Applicant: SK hynix Inc.Inventor: Jae Hyoung LEE
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Publication number: 20210340119Abstract: Provided is a novel catechol derivative or pharmaceutically acceptable salt thereof having an alkyl moiety substituted with alkylamino and/or a N-alkyl-substituted thiophene-(thio)carboxamide moiety, a process for the preparation thereof, and a pharmaceutical composition including the same.Type: ApplicationFiled: July 17, 2019Publication date: November 4, 2021Applicant: HEXAPHARMATEC CO., LTD.Inventors: Shin HAN, Jae-Hyoung LEE
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Patent number: 10978637Abstract: A method for fabricating an electronic device including a semiconductor memory may include forming a buffer layer over a substrate, the buffer layer operable to aide in crystal growth of an under layer; forming the under layer over the buffer layer, the under layer operable to aide in crystal growth of a free layer; and forming a Magnetic Tunnel Junction (MTJ) structure including the free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer over the under layer.Type: GrantFiled: February 2, 2018Date of Patent: April 13, 2021Assignee: SK hynix Inc.Inventors: Ku-Youl Jung, Guk-Cheon Kim, Jong-Koo Lim, Yang-Kon Kim, Jae-Hyoung Lee
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Patent number: 10923168Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.Type: GrantFiled: February 18, 2020Date of Patent: February 16, 2021Assignee: SK hynix Inc.Inventors: Jong-Koo Lim, Ku-Youl Jung, Jae-Hyoung Lee, Jeong-Myeong Kim, Tae-Young Lee
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Patent number: 10873021Abstract: According to one embodiment, a magnetic device includes a magnetoresistive effect element including a first ferromagnet, a conductor, and an oxide provided between the first ferromagnet and the conductor, the oxide including a first oxide of a rare-earth element and a second oxide of an element of which a covalent radius is smaller than a covalent radius of the rare-earth element.Type: GrantFiled: September 6, 2018Date of Patent: December 22, 2020Assignees: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.Inventors: Young Min Eeh, Daisuke Watanabe, Jae-Hyoung Lee, Toshihiko Nagase, Kazuya Sawada, Tadaaki Oikawa, Kenichi Yoshino, Taiga Isoda
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Publication number: 20200185017Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.Type: ApplicationFiled: February 18, 2020Publication date: June 11, 2020Inventors: Jong-Koo Lim, Ku-Youl Jung, Jae-Hyoung Lee, Jeong-Myeong Kim, Tae-Young Lee
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Patent number: 10580969Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a first magnetic layer; a second magnetic layer; and a spacer layer interposed between the first magnetic layer and the second magnetic layer, wherein the spacer layer includes a first layer, a second layer and an intermediate layer interposed between the first layer and the second layer, and wherein each of the first layer and the second layer includes an oxide, or a nitride, or a combination of an oxide and a nitride, the intermediate layer includes a multilayer structure including [Ru/x]n or [x/Ru]n, x includes a metal, an oxide, or a nitride, or a combination of a metal, an oxide and a nitride, and n represents an integer of 1 or greater.Type: GrantFiled: December 4, 2018Date of Patent: March 3, 2020Assignees: SK hynix Inc., Toshiba Memory CorporationInventors: Tae-Young Lee, Jae-Hyoung Lee, Sung-Woong Chung, Eiji Kitagawa
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Patent number: 10566041Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.Type: GrantFiled: August 6, 2018Date of Patent: February 18, 2020Assignee: SK hynix Inc.Inventors: Jong-Koo Lim, Ku-Youl Jung, Jae-Hyoung Lee, Jeong-Myeong Kim, Tae-Young Lee
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Publication number: 20190296226Abstract: According to one embodiment, a magnetic device includes a magnetoresistive effect element including a first ferromagnet, a conductor, and an oxide provided between the first ferromagnet and the conductor, the oxide including a first oxide of a rare-earth element and a second oxide of an element of which a covalent radius is smaller than a covalent radius of the rare-earth element.Type: ApplicationFiled: September 6, 2018Publication date: September 26, 2019Applicants: TOSHIBA MEMORY CORPORATION, SK HYNIX INC.Inventors: Young Min EEH, Daisuke WATANABE, Jae-Hyoung LEE, Toshihiko NAGASE, Kazuya SAWADA, Tadaaki OIKAWA, Kenichi YOSHINO, Taiga ISODA
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Patent number: 10408107Abstract: A power apparatus including a reducing agent supply control system includes: an engine configured to emit exhaust gas containing nitrogen oxide by burning air and fuel at a preset air-fuel ratio; an exhaust passage configured such that the exhaust gas emitted by the engine moves therethrough; a pressure sensor configured to actually measure the pressure of air which is supplied to the engine; a nitrogen oxide concentration sensor installed on the exhaust passage, and configured to measure the nitrogen oxide (NOx) concentration of the exhaust gas; a reducing agent supply unit configured to supply a reducing agent to the exhaust gas which moves along the exhaust passage; and a control unit configured to determine the amount of reducing agent to be supplied based on information received from the pressure sensor and the nitrogen oxide concentration sensor, and to control the reducing agent supply unit.Type: GrantFiled: April 21, 2016Date of Patent: September 10, 2019Assignee: DOOSAN INFRACORE CO., LTD.Inventors: Jae Hyoung Lee, Tae Sub Kim, Ki Bum Kim
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Patent number: 10395708Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a fixed magnetization direction; and a tunnel barrier layer interposed between the free layer and the pinned layer, wherein the free layer may include: a first sublayer having a damping constant of 0.1 or less; a second sublayer having a perpendicular magnetic anisotropy energy density ranging from 1.0×104 to 1.0×108 erg/cm3; and an insertion layer interposed between the first sublayer and the second sublayer.Type: GrantFiled: August 6, 2018Date of Patent: August 27, 2019Assignee: SK hynix Inc.Inventors: Ku-Youl Jung, Jong-Koo Lim, Yang-Kon Kim, Jae-Hyoung Lee
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Publication number: 20190173001Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a first magnetic layer; a second magnetic layer; and a spacer layer interposed between the first magnetic layer and the second magnetic layer, wherein the spacer layer includes a first layer, a second layer and an intermediate layer interposed between the first layer and the second layer, and wherein each of the first layer and the second layer includes an oxide, or a nitride, or a combination of an oxide and a nitride, the intermediate layer includes a multilayer structure including [Ru/x]n or [x/Ru]n, x includes a metal, an oxide, or a nitride, or a combination of a metal, an oxide and a nitride, and n represents an integer of 1 or greater.Type: ApplicationFiled: December 4, 2018Publication date: June 6, 2019Inventors: Tae-Young LEE, Jae-Hyoung LEE, Sung-Woong CHUNG, Eiji KITAGAWA
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Patent number: 10305028Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include an MTJ (Magnetic Tunnel Junction) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer; an under layer disposed under the MTJ structure; and a perpendicular magnetic anisotropy increasing layer disposed below the under layer and including a material having a different crystal structure from the under layer.Type: GrantFiled: March 2, 2018Date of Patent: May 28, 2019Assignee: SK hynix Inc.Inventors: Yang-Kon Kim, Ku-Youl Jung, Jong-Koo Lim, Jae-Hyoung Lee
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Publication number: 20190074041Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a free layer having a variable magnetization direction; a pinned layer having a fixed magnetization direction; and a tunnel barrier layer interposed between the free layer and the pinned layer, wherein the free layer may include: a first sublayer having a damping constant of 0.1 or less; a second sublayer having a perpendicular magnetic anisotropy energy density ranging from 1.0×104 to 1.0×108 erg/cm3; and an insertion layer interposed between the first sublayer and the second sublayer.Type: ApplicationFiled: August 6, 2018Publication date: March 7, 2019Inventors: Ku-Youl Jung, Jong-Koo Lim, Yang-Kon Kim, Jae-Hyoung Lee