Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.

Abstract: An apparatus for transmitting a broadcast signal according to an embodiment of the present invention includes a bootstrap generation unit for generating a bootstrap for signaling a system bandwidth field, corresponding to a system bandwidth for a post-bootstrap, and a baseband sampling rate coefficient; a preamble generation unit for generating a preamble located immediately following the bootstrap in a broadcast signal frame; and a payload generation unit for generating one or more subframes located immediately following the preamble in the broadcast signal frame. Here, the preamble may include L1 signaling data, and the L1 signaling data may include a reduced carrier coefficient.

Abstract: An embodiment is a sealing assembly for a twin swing gate of a vehicle, the sealing assembly including a first gate of which an outside end portion is hinge-connected to a vehicle, a second gate of which an outside end portion is hinge-connected to the vehicle and configured to be rotated in a direction opposite to rotation of the first gate, and a center bar unit along a height direction of the vehicle on an inside end portion of the first gate, the center bar being configured to rotate in conjunction with opening or closing the first gate.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.

Abstract: An embodiment integrated operating apparatus for different types of gates includes a driving motor, a main shaft rotatable by the driving motor, a first clutch portion at a first side of the main shaft and configured to selectively transmit power to a first gate of a vehicle, the first clutch portion including a first clutch and a first gear selectively engaged with each other, and a second clutch portion at a second side of the main shaft and configured to selectively transmit power to a second gate of the vehicle, the second clutch portion including a second clutch and a second gear selectively engaged with each other, wherein the first and second gates are configured to be independently operated based on the first clutch portion being in an engaged state or a released state and the second clutch portion being in the engaged state or the released state.

Abstract: A hologram projection apparatus according to an embodiment of the present invention includes: a hologram image projector configured to project a hologram test image for testing a hologram image onto a projection plate through a plurality of projection modules projecting R, G, and B images, respectively; an optimal angle calculation configured to calculate optimal projection angles of each of the projection modules when quality of the hologram test image does not satisfy reference quality; and a projection module adjuster configured to adjust angles of each of the projection modules to the optimal projection angles.

Abstract: The present invention relates to a flexible electrode material and a preparation method therefor. An aspect of the present invention provides a flexible electrode material comprising a graphene film and a free-standing metal oxide formed on the graphene film.

Abstract: An apparatus and method for multiplexing signals using layered division multiplexing are disclosed. A signal multiplexing apparatus according to an embodiment of the present invention includes a combiner configured to combine a core layer signal and an enhanced layer signal at different power levels, and a time interleaver configured to perform interleaving applied to both the core layer signal and the enhanced layer signal.

Abstract: A bulk-acoustic wave (BAW) resonator includes a central portion in which a first electrode, a piezoelectric layer, and a second electrode are sequentially stacked on a substrate, and an extension portion extending externally from the central portion, and an insertion layer and a loss prevention film are disposed in the extension portion between the substrate and the second electrode. The loss prevention film is formed to have a thickness of 50 ? to 500 ?. The insertion layer is stacked on the loss prevention film, and has a side surface opposing the central portion, the side surface is formed as a first inclined surface having a first inclination angle. The loss prevention film has a side surface opposing the central portion, the side surface is formed as a second inclined surface having a second inclination angle. The second inclination angle is formed to be greater than the first inclination angle.

Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.

Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.

Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.

Abstract: Provided are a 2-arylthiazole derivative or pharmaceutically acceptable salt thereof having a specific carboxamide moiety, including a substituted aminoalkyl-carboxamide moiety, a N-containing heterocyclic-alkyl-carboxamide moiety, or a N-containing heterocyclic-carboxamide moiety, a process for the preparation thereof, and a pharmaceutical composition comprising the same.

Abstract: A method of manufacturing a semiconductor device includes forming a first stack, forming a sacrificial structure and a first contact passing through the first stack, forming a second stack on the first stack, forming a first hole through the second stack to expose the sacrificial structure, forming a second hole through the first stack by removing the sacrificial structure, forming a channel structure in the first and second holes, and forming a second contact passing through the second stack and coupled to the first contact.

Abstract: Provided is a novel catechol derivative or pharmaceutically acceptable salt thereof having an alkyl moiety substituted with alkylamino and/or a N-alkyl-substituted thiophene-(thio)carboxamide moiety, a process for the preparation thereof, and a pharmaceutical composition including the same.

Abstract: A method for fabricating an electronic device including a semiconductor memory may include forming a buffer layer over a substrate, the buffer layer operable to aide in crystal growth of an under layer; forming the under layer over the buffer layer, the under layer operable to aide in crystal growth of a free layer; and forming a Magnetic Tunnel Junction (MTJ) structure including the free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer over the under layer.

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.

Abstract: According to one embodiment, a magnetic device includes a magnetoresistive effect element including a first ferromagnet, a conductor, and an oxide provided between the first ferromagnet and the conductor, the oxide including a first oxide of a rare-earth element and a second oxide of an element of which a covalent radius is smaller than a covalent radius of the rare-earth element.

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a variable resistance element including a Magnetic Tunnel Junction (MTJ) structure including a free layer having a variable magnetization direction, a pinned layer having a fixed magnetization direction and a tunnel barrier layer interposed between the free layer and the pinned layer; a first protective layer disposed on a lower sidewall of the variable resistance element; and a second protective layer disposed on an upper sidewall of the variable resistance element, wherein any one layer of the first protective layer and the second protective layer may apply a compressive stress to the variable resistance element, and the other layer applies a tensile stress to the variable resistance element.

Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a first magnetic layer; a second magnetic layer; and a spacer layer interposed between the first magnetic layer and the second magnetic layer, wherein the spacer layer includes a first layer, a second layer and an intermediate layer interposed between the first layer and the second layer, and wherein each of the first layer and the second layer includes an oxide, or a nitride, or a combination of an oxide and a nitride, the intermediate layer includes a multilayer structure including [Ru/x]n or [x/Ru]n, x includes a metal, an oxide, or a nitride, or a combination of a metal, an oxide and a nitride, and n represents an integer of 1 or greater.