Patents by Inventor Jae-hyun Yeo

Jae-hyun Yeo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10049943
    Abstract: A method of manufacturing a semiconductor device includes forming a first gate structure on a substrate, the first gate structure including a gate insulation layer, a gate electrode, and a hard mask sequentially stacked on the substrate, forming a preliminary spacer layer on sidewalls of the first gate structure and the substrate, the preliminary spacer layer including silicon nitride, implanting molecular ions into the preliminary spacer layer to form a spacer layer having a dielectric constant lower than a dielectric constant of the preliminary spacer layer, anisotropically etching the spacer layer to form spacers on the sidewalls of the first gate structure, and forming impurity regions at upper portions of the substrate adjacent to the first gate structure.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: August 14, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Hyun Yeo, Jae-Suk Kwon, Kwang-Woo Lee, Eun-Seong Lee
  • Publication number: 20170011967
    Abstract: A method of manufacturing a semiconductor device includes forming a first gate structure on a substrate, the first gate structure including a gate insulation layer, a gate electrode, and a hard mask sequentially stacked on the substrate, forming a preliminary spacer layer on sidewalls of the first gate structure and the substrate, the preliminary spacer layer including silicon nitride, implanting molecular ions into the preliminary spacer layer to form a spacer layer having a dielectric constant lower than a dielectric constant of the preliminary spacer layer, anisotropically etching the spacer layer to form spacers on the sidewalls of the first gate structure, and forming impurity regions at upper portions of the substrate adjacent to the first gate structure.
    Type: Application
    Filed: June 2, 2016
    Publication date: January 12, 2017
    Inventors: Jae-Hyun YEO, Jae-Suk KWON, Kwang-Woo LEE, Eun-Seong LEE
  • Patent number: 8399364
    Abstract: Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: March 19, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kil-chul Kim, Jong-cheol Lee, Ki-vin Im, Jae-hyun Yeo
  • Publication number: 20110230056
    Abstract: Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.
    Type: Application
    Filed: February 2, 2011
    Publication date: September 22, 2011
    Inventors: Kil-chul Kim, Jong-cheol Lee, Ki-vin Im, Jae-hyun Yeo
  • Patent number: 7838438
    Abstract: A dielectric layer, an MIM capacitor, a method of manufacturing the dielectric layer and a method of manufacturing the MIM capacitor. The method of manufacturing the dielectric layer includes chemically reacting a metal source with different amounts of an oxidizing agent based on the cycle of the chemical reactions in order to control leakage characteristics of the dielectric layer, the electrical characteristics of the dielectric layer, and the dielectric characteristics of the dielectric layer.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: November 23, 2010
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Ki Vin Im, Jae Hyun Yeo, Kyoung Ryul Yoon, Jong Cheol Lee, Eun Ae Chung, Young Sun Kim
  • Patent number: 7791125
    Abstract: A method of forming a semiconductor device includes loading a semiconductor substrate into a reaction chamber, and providing metal organic precursors including hafnium and zirconium into the reaction chamber to form hafnium-zirconium oxide (HfxZr1-xO; 0<X<1) with a tetragonal crystalline structure on the semiconductor substrate. Related structures are also discussed.
    Type: Grant
    Filed: July 27, 2007
    Date of Patent: September 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hoon-Sang Choi, Jong-Cheol Lee, Ki-Vin Im, Jae-Hyun Yeo, Eun-Ae Chung, Sang-Yeol Kang
  • Patent number: 7759718
    Abstract: A method of forming a dielectric layer in a capacitor adapted for use in a semiconductor device is disclosed. The method includes forming a first ZrO2 layer, forming an interfacial layer using a plasma treatment on the first ZrO2 layer, and forming a second ZrO2 layer on the interfacial layer.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: July 20, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-yeol Kang, Jong-cheol Lee, Ki-vin Im, Jae-hyun Yeo, Hoon-sang Choi, Eun-ae Chung
  • Patent number: 7648874
    Abstract: In a method of manufacturing a dielectric structure, after a first dielectric layer is formed on a substrate by using a metal oxide doped with silicon, the substrate is placed on a susceptor of a chamber. By treating the first dielectric layer with a plasma in controlling a voltage difference between the susceptor and a ground, a second dielectric layer is formed on the first dielectric layer. The second dielectric layer including a metal oxynitride doped with silicon having enough content of nitrogen is formed on the first dielectric layer. Therefore, dielectric properties of the dielectric structure comprising the first and the second dielectric layers can be improved and a leakage current can be greatly decreased. By adapting the dielectric structure to a gate insulation layer and/or to a dielectric layer of a capacitor or of a non-volatile semiconductor memory device, capacitances and electrical properties can be improved.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: January 19, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Cheol Lee, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo, Gab-Jin Nam, Young-Geun Park, Jae-Hyoung Choi, Jae-Hyun Yeo, Ha-Jin Lim, Yun-Seok Kim
  • Publication number: 20090258470
    Abstract: Methods of manufacturing a semiconductor device include forming an absorption layer on a surface of a substrate by exposing the surface of the substrate to a first reaction gas at a first temperature. A metal oxide layer is then formed on the surface of the substrate by exposing the absorption layer to a second reaction gas at a second temperature. The first reaction gas may include a precursor containing zirconium (e.g., tetrakis(ethylmethylamino)zirconium) and the second reaction gas may include an oxidizing agent.
    Type: Application
    Filed: April 14, 2009
    Publication date: October 15, 2009
    Inventors: Jae-Hyoung Choi, Jin-Hyuk Choi, Cha-Young Yoo, Kyu-Ho Cho, Wan-Don Kim, Kyoung-Ryul Yoon, Jae-Hyun Yeo, Yong-Suk Tak
  • Publication number: 20090195962
    Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.
    Type: Application
    Filed: February 25, 2009
    Publication date: August 6, 2009
    Inventors: Jong-Cheol Lee, Kyoung-Ryul Yoon, Ki-Vin Im, Jae-Hyun Yeo, Eun-Ae Chung, Jin-Il Lee
  • Patent number: 7514315
    Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: April 7, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Cheol Lee, Kyoung-Ryul Yoon, Ki-Vin Im, Jae-Hyun Yeo, Eun-Ae Chung, Jin-Il Lee
  • Patent number: 7485585
    Abstract: In a method of forming a thin film and methods of manufacturing a gate structure and a capacitor, a hafnium precursor including one alkoxy group and three amino groups, and an oxidizing agent are provided on a substrate. The hafnium precursor is reacted with the oxidizing agent to form the thin film including hafnium oxide on the substrate. The hafnium precursor may be employed for forming a gate insulation layer of a transistor or a dielectric layer of a capacitor.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: February 3, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young-Geun Park, Jae-Hyun Yeo, Eun-Ae Chung, Ki-Vin Im, Young-Sun Kim, Sung-Tae Kim, Cha-Young Yoo
  • Patent number: 7482677
    Abstract: In a method of manufacturing a dielectric structure, after a tunnel oxide layer pattern is formed on a substrate, a floating gate is formed on the tunnel oxide layer. After a first dielectric layer pattern including a metal silicon oxide and a second dielectric layer pattern including a metal silicon oxynitride are formed, a control gate is formed on the dielectric structure. Since the dielectric structure includes at least one metal silicon oxide layer and at least one metal silicon oxynitride layer, the dielectric structure may have a high dielectric constant and a good thermal resistance. A non-volatile semiconductor memory device including the dielectric structure may have good electrical characteristics such as a large capacitance and a low leakage current.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: January 27, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Cheol Lee, Sung-Tae Kim, Young-Sun Kim, Cha-Young Yoo, Gab-Jin Nam, Young-Geun Park, Jae-Hyoung Choi, Jae-Hyun Yeo, Ha-Jin Lim, Yun-Seok Kim
  • Patent number: 7442981
    Abstract: Provided is a capacitor of a semiconductor device and a method of fabricating the same. In one embodiment, the capacitor includes a lower electrode formed on a semiconductor substrate; a dielectric layer formed on the lower electrode; and an upper electrode that is formed on the dielectric layer. The upper electrode includes a first conductive layer, a second conductive layer, and a third conductive layer stacked sequentially. The first conductive layer comprises a metal layer, a conductive metal oxide layer, a conductive metal nitride layer, or a conductive metal oxynitride layer. The second conductive layer comprises a doped polysilicon germanium layer. The third conductive layer comprises a material having a lower resistance than that of the second conductive layer.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: October 28, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gab-Jin Nam, Young-Sun Kim, Cha-Young Yoo, Jong-Cheol Lee, Jin-Tae Noh, Jae-Young Ahn, Young-Geun Park, Jae-Hyoung Choi, Jae-Hyun Yeo
  • Patent number: 7425514
    Abstract: Disclosed are methods of forming dielectric materials using atomic layer deposition (ALD) and methods of forming dielectric layers from such materials on a semiconductor device. The ALD process utilizes a first reactant containing at least one alkoxide group that is chemisorbed onto a surface of a substrate and then reacted with an activated oxidant that contains no hydroxyl group to form a dielectric material exhibiting excellent step coverage and improved leakage current characteristics.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: September 16, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hyun Yeo, Young-Sun Kim, Sung-Tae Kim, In-Sung Park, Gi-Vin Im
  • Publication number: 20080122044
    Abstract: A method of forming a dielectric layer in a capacitor adapted for use in a semiconductor device is disclosed. The method includes forming a first ZrO2 layer, forming an interfacial layer using a plasma treatment on the first ZrO2 layer, and forming a second ZrO2 layer on the interfacial layer.
    Type: Application
    Filed: October 2, 2007
    Publication date: May 29, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-yeol KANG, Jong-cheol LEE, Ki-vin IM, Jae-hyun YEO, Hoon-sang CHOI, Eun-ae CHUNG
  • Publication number: 20080029031
    Abstract: Methods and apparatus are provided for forming thin films for semiconductor devices, which enable supplying and removing reactants containing constituent elements of a thin film to be formed, by preheating and supplying a process gas and a purging gas at a predetermined temperature in forming the thin film on a substrate. For example, a method for forming a thin film includes supplying a first reactant to a chamber to chemically absorb the first reactant onto a substrate, the first reactant being bubbled by a first gas that is preheated, purging the chamber to remove residues on the substrate having the first reactant chemically absorbed, and forming the thin film by a means of chemical displacement by supplying a second reactant to the chamber to chemically absorb the second reactant onto the substrate.
    Type: Application
    Filed: August 15, 2007
    Publication date: February 7, 2008
    Inventors: Jae-Hyun Yeo, Young-Wook Park, Ki-Chul Kim, Jae-Jong Han
  • Publication number: 20080023746
    Abstract: A method of forming a semiconductor device includes loading a semiconductor substrate into a reaction chamber, and providing metal organic precursors including hafnium and zirconium into the reaction chamber to form hafnium-zirconium oxide (HfxZr1-xO; 0<X<1) with a tetragonal crystalline structure on the semiconductor substrate. Related structures are also discussed.
    Type: Application
    Filed: July 27, 2007
    Publication date: January 31, 2008
    Inventors: Hoon-Sang Choi, Jong-Cheol Lee, Ki-Vin Im, Jae-Hyun Yeo, Eun-Ae Chung, Sang-Yeol Kang
  • Publication number: 20070257370
    Abstract: A multilayer electrode structure has a conductive layer including aluminum, an oxide layer formed on the conductive layer, and an oxygen diffusion barrier layer. The oxide layer includes zirconium oxide and/or titanium oxide. The oxygen diffusion barrier layer is formed at an interface between the conductive layer and the oxide layer by re-oxidizing the oxide layer. The oxygen diffusion barrier layer includes aluminum oxide.
    Type: Application
    Filed: April 11, 2007
    Publication date: November 8, 2007
    Inventors: Jong-Cheol Lee, Kyoung-Ryul Yoon, Ki-Vin Im, Jae-Hyun Yeo, Eun-Ae Chung, Jin-Il Lee
  • Publication number: 20070259212
    Abstract: The present invention provides methods of forming metal thin films, lanthanum oxide films and high dielectric films. Compositions of metal thin films, lanthanum oxide films and high dielectric films are also provided. Further provided are semiconductor devices comprising the metal thin films, lanthanum oxide films and high dielectric films provided herein.
    Type: Application
    Filed: July 16, 2007
    Publication date: November 8, 2007
    Inventors: Ki-yeon Park, Sung-tae Kim, Young-sun Kim, In-sung Park, Jae-hyun Yeo, Yun-jung Lee, Ki-vin Im