Abstract: A semiconductor device is described. The device includes lower and upper channel layers over an active region on a substrate. The device further includes a middle insulating structure disposed between the lower and the upper channels. The device includes gate structures surrounding the channel layers, lower and upper source/drain regions disposed on the active region on at least one side of the gate structures. Between the lower and upper source/drain regions is a barrier structure. The lower and upper source/drain regions may each fill a lower recess region or an upper recess region, respectively. These recess regions are defined by the respective channel layers, the gate structures, and by the barrier structure. The side surface slopes within the upper and the lower recess regions may vary and the side surface slopes of each of the recess regions may be different from each other.

Abstract: An object of the present disclosure is to implement a coloring pattern with a constant illuminance value on an electrode substrate to thereby increase display reliability and lifetime while reducing delamination of the hole transport layer (HTL) in the post-process. That is, when the roughness of the pattern after post-baking treatment is low, it may cause delamination of the hole transport layer (HTL) and a decrease in lifetime due to defective pixels, and thus a certain roughness can be obtained by minimizing the surface flow by leaving the substrate at a high temperature during post-baking treatment according to the present disclosure.

Abstract: A cleaning device is provided.