Patents by Inventor Jaekang Yoo

Jaekang Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit packaging system with void prevention mechanism and method of manufacture thereof
    Patent number: 9129978
    Abstract: An integrated circuit packaging system, and a method of manufacture of an integrated circuit packaging system thereof, includes: a singulation substrate having an air vent portion having longitudinal grooves in the air vent portion, the longitudinal grooves all parallel to each other; an integrated circuit die attached to the singulation substrate; and a molding compound on the singulation substrate, on the air vent portion, in a portion of the longitudinal grooves, and on the integrated circuit die.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: September 8, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventors: Jaepil Kim, Seokhyun Kim, Daeup Bae, Jaewon Kim, Jaekang Yoo, Sungpil Hur