Patents by Inventor Jae-Ku Park
Jae-Ku Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11949046Abstract: A light-emitting element includes a first semiconductor layer doped to have a first polarity, a second semiconductor layer doped to have a second polarity different from the first polarity, a light-emitting layer disposed between the first and second semiconductor layers, a shell layer formed on side surfaces of the first semiconductor layer, the light-emitting layer, and the second semiconductor layer, the shell layer including a divalent metal element, and an insulating film covering an outer surface of the shell layer and surrounding the side surface of the light-emitting layer.Type: GrantFiled: August 6, 2021Date of Patent: April 2, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Se Hun Kim, Chang Hee Lee, Yun Hyuk Ko, Duk Ki Kim, Jun Woo Park, Soo Ho Lee, Jae Kook Ha, Yun Ku Jung
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Publication number: 20230249188Abstract: A pouch for in-vitro diagnostic items having a pocket portion of a diagnosis item with a storage space of the diagnosis item therein, including a buffer supporter formation portion, wherein the buffer supporter formation portion is formed by extending in a plate shape from one side of the pocket portion of the diagnosis item, a buffer support hole is formed penetratingly in a thickness direction in one area of the buffer supporter formation portion, and a buffer supporter is formed by bending motion in the buffer supporter formation portion separated from the pocket portion of the diagnosis item, wherein the buffer supporter includes a buffer-mounted shelf for mounting the buffer, a left leg portion for supporting shelf to support the left end of the buffer-mounted shelf against the bottom, and a right leg portion for supporting shelf to support the right end of the buffer-mounted shelf against the bottom.Type: ApplicationFiled: December 6, 2022Publication date: August 10, 2023Inventor: Jae Ku PARK
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Publication number: 20220396016Abstract: Provided is a stack molding machine including an upper mold having formed therein a first runner and a first gate serving as a path of a resin material, a first intermediate plate provided under and combined with the upper mold, and having formed therein a first molding connected to the first gate to mold at least a portion on a first substrate placed under the first intermediate plate, a dummy plate provided under and spaced a certain distance apart from the first intermediate plate, a second intermediate plate provided under the dummy plate, and having formed therein a second molding connected to a second gate to mold at least a portion under a second substrate placed under the dummy plate, and a lower mold having formed therein a second runner and the second gate serving as a path of the resin material, and combined with the second intermediate plate.Type: ApplicationFiled: April 26, 2022Publication date: December 15, 2022Inventors: Hyuk Hwi NA, Ho Seok HWANG, Sang Hoon AHN, Jae Ku PARK, Eun Bin LEE, Sang Dae KIM, Dong Jin JANG
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Patent number: 11375623Abstract: A method of fabricating a battery protection circuit package according to one aspect of the present invention includes forming a first mounting structure by mounting battery protection circuit elements on a printed circuit board (PCB), forming a second mounting structure by mounting the first mounting structure on a lead frame which comprises an input/output terminal portion for external connection and at least one metal tab for battery cell connection, forming an encapsulation structure by encapsulating the second mounting structure with a molding material to encapsulate at least a part of the battery protection circuit elements while exposing the input/output terminal portion and the at least one metal tab of the lead frame, and bonding at least one flexible printed circuit board (FPCB) to the input/output terminal portion of the encapsulation structure.Type: GrantFiled: June 22, 2020Date of Patent: June 28, 2022Assignee: ITM SEMICONDUCTOR CO., LTD.Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee
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Patent number: 10950845Abstract: Provided is a battery protection circuit module package capable of easily achieving high integration and size reduction. The battery protection circuit module package includes a terminal lead frame including a first internal connection terminal lead and a second internal connection terminal lead provided at two edges of the terminal lead frame and electrically connected to electrode terminals of a battery bare cell, and a plurality of external connection terminal leads provided between the first and second internal connection terminal leads and serving as a plurality of external connection terminals, and a device package including a substrate mounted on the terminal lead frame to be electrically connected to the terminal lead frame, and providing a battery protection circuit device thereon.Type: GrantFiled: January 22, 2019Date of Patent: March 16, 2021Assignee: ITM SEMICONDUCTOR CO., LTDInventors: Ho-seok Hwang, Young-Seok Kim, Seong-beom Park, Sang-hoon Ahn, Tae Hwan Jung, Seung-uk Park, Jae-ku Park, Myoung-Ki Moon, Hyun-suck Lee, Da-Woon Jung
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Publication number: 20210014976Abstract: A method of fabricating a battery protection circuit package according to one aspect of the present invention includes forming a first mounting structure by mounting battery protection circuit elements on a printed circuit board (PCB), forming a second mounting structure by mounting the first mounting structure on a lead frame which comprises an input/output terminal portion for external connection and at least one metal tab for battery cell connection, forming an encapsulation structure by encapsulating the second mounting structure with a molding material to encapsulate at least a part of the battery protection circuit elements while exposing the input/output terminal portion and the at least one metal tab of the lead frame, and bonding at least one flexible printed circuit board (FPCB) to the input/output terminal portion of the encapsulation structure.Type: ApplicationFiled: June 22, 2020Publication date: January 14, 2021Inventors: Hyuk Hwi NA, Ho Seok HWANG, Young Seok KIM, Sang Hoon AHN, Jae Ku PARK, Sung Hee WANG, Eun Bin LEE
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Publication number: 20190157653Abstract: Provided is a battery protection circuit module package capable of easily achieving high integration and size reduction. The battery protection circuit module package includes a terminal lead frame including a first internal connection terminal lead and a second internal connection terminal lead provided at two edges of the terminal lead frame and electrically connected to electrode terminals of a battery bare cell, and a plurality of external connection terminal leads provided between the first and second internal connection terminal leads and serving as a plurality of external connection terminals, and a device package including a substrate mounted on the terminal lead frame to be electrically connected to the terminal lead frame, and providing a battery protection circuit device thereon.Type: ApplicationFiled: January 22, 2019Publication date: May 23, 2019Inventors: Ho-seok HWANG, Young-Seok KIM, Seong-beom PARK, Sang-hoon AHN, Tae Hwan JUNG, Seung-uk PARK, Jae-ku PARK, Myoung-Ki MOON, Hyun-suck LEE, Da-Woon JUNG
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Patent number: 9787111Abstract: Disclosed is a battery protection module package (PMP). The battery PMP according to an embodiment of the present invention includes a lead frame provided with a plurality of external terminals thereon, a printed circuit board stacked on the lead frame, and a plurality of internal terminals, a protection integrated chip (IC), a field effect transistor (FET), resistors, and capacitors disposed on the printed circuit board and electrically connected to each other, wherein the resistors and the capacitors are mounted on a pattern of the printed circuit board using surface mount technology (SMT), and wherein the plurality of internal terminals are electrically connected to the plurality of external terminals.Type: GrantFiled: December 13, 2013Date of Patent: October 10, 2017Assignee: ITM SEMICONDUCTOR CO., LTDInventors: Hyeok Hwi Na, Ho Suk Hwang, Young Seok Kim, Sung Beum Park, Sang Hoon Ahn, Tae Hwan Jung, Seung Uk Park, Jae Ku Park, Hyun Mok Cho, Min Ho Park, Young Geun Yoon, Seong Ho Ju, Young Nam Ji, Myoung Ki Moon, Hyun Suck Lee, Ji Young Park
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Publication number: 20160056444Abstract: Disclosed is a battery protection circuit module package capable of easily achieving high integration and size reduction. The battery protection circuit module package includes a terminal lead frame including a first internal connection terminal lead and a second internal connection terminal lead provided at two edges of the terminal lead frame and electrically connected to electrode terminals of a battery bare cell, and a plurality of external connection terminal leads provided between the first and second internal connection terminal leads and serving as a plurality of external connection terminals, and a device package including a substrate mounted on the terminal lead frame to be electrically connected to the terminal lead frame, and providing a battery protection circuit device thereon.Type: ApplicationFiled: April 17, 2014Publication date: February 25, 2016Inventors: Ho-seok HWANG, Young-Seok KIM, Seong-beom PARK, Sang-hoon AHN, Tae Hwan JUNG, Seung-uk PARK, Jae-ku PARK, Myoung-Ki MOON, Hyun-suck LEE, Da-Woon JUNG
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Publication number: 20150333548Abstract: Disclosed is a battery protection module package (PMP). The battery PMP according to an embodiment of the present invention includes a lead frame provided with a plurality of external terminals thereon, a printed circuit board stacked on the lead frame, and a plurality of internal terminals, a protection integrated chip (IC), a field effect transistor (FET), resistors, and capacitors disposed on the printed circuit board and electrically connected to each other, wherein the resistors and the capacitors are mounted on a pattern of the printed circuit board using surface mount technology (SMT), and wherein the plurality of internal terminals are electrically connected to the plurality of external terminals.Type: ApplicationFiled: December 13, 2013Publication date: November 19, 2015Inventors: Hyeok Hwi NA, Ho Suk HWANG, Young Seok KIM, Sung Beum PARK, Sang Hoon AHN, Tae Hwan JUNG, Seung Uk PARK, Jae Ku PARK, Hyun Mok CHO, Min Ho PARK, Young Geun YOON, Seong Ho JU, Young Nam JI, Myoung Ki MOON, Hyun Suck LEE, Ji Young PARK
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Publication number: 20090311141Abstract: The present invention relates to an immunochromatographic strip and a kit comprising the same.Type: ApplicationFiled: August 2, 2007Publication date: December 17, 2009Inventor: Jae-Ku Park
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Patent number: D930588Type: GrantFiled: December 31, 2019Date of Patent: September 14, 2021Assignee: ITM SEMICONDUCTOR CO., LTD.Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee
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Patent number: D932436Type: GrantFiled: December 31, 2019Date of Patent: October 5, 2021Assignee: ITM SEMICONDUCTOR CO., LTD.Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee
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Patent number: D932437Type: GrantFiled: December 31, 2019Date of Patent: October 5, 2021Assignee: ITM SEMICONDUCTOR CO., LTD.Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee
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Patent number: D932438Type: GrantFiled: December 31, 2019Date of Patent: October 5, 2021Assignee: ITM SEMICONDUCTOR CO., LTD.Inventors: Hyuk Hwi Na, Ho Seok Hwang, Young Seok Kim, Sang Hoon Ahn, Jae Ku Park, Sung Hee Wang, Eun Bin Lee