Patents by Inventor Jae Min Myoung

Jae Min Myoung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11569446
    Abstract: Disclosed are a method of manufacturing a microstructure array that includes preparing a mold having a concave micro pattern array in which a plurality of concave micro patterns are arranged, preparing a perovskite precursor solution including a perovskite precursor and a hydrophilic polymer, coating the perovskite precursor solution on a substrate, disposing the mold on the perovskite precursor solution to confine the perovskite precursor solution in the plurality of concave micro patterns, obtaining a composite of perovskite nanocrystals and the hydrophilic polymer from the perovskite precursor solution in the plurality of concave micro patterns, and, and removing the mold to form a microstructure array in which a plurality of microstructures including a composite of the perovskite nanocrystals and the hydrophilic polymer are arranged, a microstructure array, a micro light emitting diode including the same, and a manufacturing method thereof, and a display device.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: January 31, 2023
    Assignee: YONSEI UNIVERSITY, UNIVERSITY—INDUSTRY FOUNDATION (UIF)
    Inventors: Jae-Min Myoung, Yun Cheol Kim, Hee Ju An, Do Hoon Kim
  • Publication number: 20210159415
    Abstract: Disclosed are a method of manufacturing a microstructure array that includes preparing a mold having a concave micro pattern array in which a plurality of concave micro patterns are arranged, preparing a perovskite precursor solution including a perovskite precursor and a hydrophilic polymer, coating the perovskite precursor solution on a substrate, disposing the mold on the perovskite precursor solution to confine the perovskite precursor solution in the plurality of concave micro patterns, obtaining a composite of perovskite nanocrystals and the hydrophilic polymer from the perovskite precursor solution in the plurality of concave micro patterns, and, and removing the mold to form a microstructure array in which a plurality of microstructures including a composite of the perovskite nanocrystals and the hydrophilic polymer are arranged, a microstructure array, a micro light emitting diode including the same, and a manufacturing method thereof, and a display device.
    Type: Application
    Filed: August 21, 2020
    Publication date: May 27, 2021
    Inventors: Jae-Min MYOUNG, Yun Cheol KIM, Hee Ju AN, Do Hoon KIM
  • Patent number: 10256366
    Abstract: Provided are a light-emitting diode and a method of fabricating the same. The light-emitting diode includes a first electrode; a P-type zinc oxide layer which is formed on the first electrode and comprises nano-discs doped with an impurity or nano-rods of zinc oxide doped with an impurity; an N-type zinc oxide layer, which is formed on the P-type zinc oxide layer, comprises nano-rods, and the nano-rods of the N-type zinc oxide layer constitutes homojunction having an epitaxial interface with the P-type zinc oxide layer; and a second electrode, which is formed on the N-type zinc oxide layer.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: April 9, 2019
    Assignee: UIVERSITY-INDUSTRY FOUNDATION (UIF), YONSEI UNIVERSITY
    Inventors: Jae-Min Myoung, Sung-Doo Back
  • Publication number: 20180122983
    Abstract: Provided are a light-emitting diode and a method of fabricating the same. The light-emitting diode includes a first electrode; a P-type zinc oxide layer which is formed on the first electrode and comprises nano-discs doped with an impurity or nano-rods of zinc oxide doped with an impurity; an N-type zinc oxide layer, which is formed on the P-type zinc oxide layer, comprises nano-rods, and the nano-rods of the N-type zinc oxide layer constitutes homojunction having an epitaxial interface with the P-type zinc oxide layer; and a second electrode, which is formed on the N-type zinc oxide layer.
    Type: Application
    Filed: September 26, 2017
    Publication date: May 3, 2018
    Inventors: Jae-Min Myoung, Sung-Doo Back
  • Patent number: 9653625
    Abstract: A method of manufacturing antireflective coating for solar cell having a moth-eye structure and a solar cell including the same are provided to greatly reduce reflectivity by forming an antireflective coating layer having a moth-eye structure on an upper electrode layer of the solar cell using a bottom-up method. A bottom electrode layer is formed on a substrate. A photoreactive layer is formed on the bottom electrode layer. The photoreactive layer is made of CIS (Copper, Indium, Selenide) materials. A buffer layer is formed on the photoreactive layer. A ZnO layer is formed on the buffer layer. A top electrode layer is formed on the ZnO layer.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: May 16, 2017
    Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Jae Min Myoung, Beom Ki Shin, Tae Il Lee
  • Publication number: 20150315069
    Abstract: A glass of the present invention includes a first layer having a porous structure of nanoscale pores which are etched by an etchant that is a substitute for hydrofluoric acid (HF) or fluoride such that HF or fluoride is not used as the etchant, and a second layer which is not etched by the etchant. The glass is effectively applied to various applications requiring high light transmission such as a protective filter for a display device, a solar cell, a mobile communication device, glass of a building structure, and an optical element lens.
    Type: Application
    Filed: July 16, 2015
    Publication date: November 5, 2015
    Inventors: Jae Min Myoung, Jun Jie Xiong, Tae II Lee
  • Patent number: 9112076
    Abstract: A glass substrate manufacturing method of the present invention comprises forming a multi-porous structure layer which comprises nano-size pores at a surface of a glass substrate by etching the surface of the glass substrate with hydrofluoric (HF) acid or an etchant substituting for fluoride. Unlike related art methods, the glass substrate forms no additional coating layer, uses no harmful chemical material, and is given anti-reflection, anti-fogging, and super-hydrophilic characteristics through a simple process at a relatively low temperature. The glass substrate is effectively applied to various applications requiring high light transmission such as a protective filter for a display device, a solar cell, a mobile communication device, glass of a building structure, and an optical element lens.
    Type: Grant
    Filed: August 10, 2011
    Date of Patent: August 18, 2015
    Assignee: INDUSTRY-ACADEMIC COOPERATION FOUNDATION YONSEI UNIVERSITY
    Inventors: Jae Min Myoung, Jun Jie Xiong, Tae Il Lee
  • Publication number: 20150188028
    Abstract: A self-powered generator is provided. The generator includes a piezoelectric nanorod member layer that includes a first layer; a second layer; and a plurality of piezoelectric nanorods disposed between the first and second layers. The piezoelectric nanorod is a biaxially-grown nanorod. When mechanical energy is applied from an outside, an upper half and a lower half of each of the plurality of piezoelectric nanorods generate piezoelectric potentials having opposite polarities, the upper half and the lower half being on both sides of a longitudinal axis along an axis perpendicular to the longitudinal axis.
    Type: Application
    Filed: April 25, 2014
    Publication date: July 2, 2015
    Applicant: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Hong Koo BAIK, Jae Min Myoung, Woo Soon Jang, Tae IL Lee
  • Publication number: 20140166101
    Abstract: A method of manufacturing antireflective coating for solar cell having a moth-eye structure and a solar cell including the same are provided to greatly reduce reflectivity by forming an antireflective coating layer having a moth-eye structure on an upper electrode layer of the solar cell using a bottom-up method. A bottom electrode layer is formed on a substrate. A photoreactive layer is formed on the bottom electrode layer. The photoreactive layer is made of CIS (Copper, Indium, Selenide) materials. A buffer layer is formed on the photoreactive layer. A ZnO layer is formed on the buffer layer. A top electrode layer is formed on the ZnO layer.
    Type: Application
    Filed: December 15, 2011
    Publication date: June 19, 2014
    Applicant: Industry-Academic Corporation Foundation, Yonsei University
    Inventors: Jae Min Myoung, Beom Ki Shin, Tae II Lee
  • Publication number: 20130164521
    Abstract: A glass substrate manufacturing method of the present invention comprises forming a multi-porous structure layer which comprises nano-size pores at a surface of a glass substrate by etching the surface of the glass substrate with hydrofluoric (HF) acid or an etchant substituting for fluoride. Unlike related art methods, the glass substrate forms no additional coating layer, uses no harmful chemical material, and is given anti-reflection, anti-fogging, and super-hydrophilic characteristics through a simple process at a relatively low temperature. The glass substrate is effectively applied to various applications requiring high light transmission such as a protective filter for a display device, a solar cell, a mobile communication device, glass of a building structure, and an optical element lens.
    Type: Application
    Filed: August 10, 2011
    Publication date: June 27, 2013
    Inventors: Jae Min Myoung, Jun Jie Xiong, Tae Il Lee
  • Patent number: 8399334
    Abstract: A method of manufacturing a nano device by directly printing a plurality of NW devices in a desired shape on a predesigned gate substrate. The method includes preparing an NW solution, preparing a building block for performing decaling onto the substrate by carrying an NW device, forming the NW device by connecting electrodes of each of building block units of the building block using NWs by dropping the NW solution between the electrodes and then through dielectrophoresis, visually inspecting the numbers of NW bridges that are formed between the electrodes of each of the building block units through the dielectrophoresis, grouping the building block units according to the numbers, and decaling the NW device formed on each of the building block units onto the gate substrate by bringing the grouped building block units into contact with the predesigned gate substrate and then detaching the grouped building block units.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: March 19, 2013
    Assignee: Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Jae Min Myoung, Hong Koo Baik, Tae Il Lee
  • Patent number: 8227348
    Abstract: A method for patterning nanowires on a substrate. The method includes procedures of preparing a substrate having a patterned sacrificial layer of barium fluoride thereon; growing nanowires on an entire surface of the resultant substrate including the patterned sacrificial layer; and removing the patterned sacrificial layer using a solvent to remove part of the nanowires on the patterned sacrificial layer such that part of the nanowires in direct contact with the substrate remains on the substrate to thereby form a nanowire pattern.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: July 24, 2012
    Assignee: Industry-Academic Corporation Foundation, Yonsei University
    Inventors: Jae Min Myoung, Jyoti Prakash Kar
  • Publication number: 20110309323
    Abstract: A method of manufacturing a nano device by directly printing a plurality of NW devices in a desired shape on a predesigned gate substrate. The method includes preparing an NW solution, preparing a building block for performing decaling onto the substrate by carrying an NW device, forming the NW device by connecting electrodes of each of building block units of the building block using NWs by dropping the NW solution between the electrodes and then through dielectrophoresis, visually inspecting the numbers of NW bridges that are formed between the electrodes of each of the building block units through the dielectrophoresis, grouping the building block units according to the numbers, and decaling the NW device formed on each of the building block units onto the gate substrate by bringing the grouped building block units into contact with the predesigned gate substrate and then detaching the grouped building block units.
    Type: Application
    Filed: January 27, 2011
    Publication date: December 22, 2011
    Applicant: INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Jae Min MYOUNG, Hong Koo BAIK, Tae Il LEE
  • Patent number: 7963247
    Abstract: According to an exemplary embodiment of the present invention, a diffusion tube includes a diffusion housing which includes a first cavity within a first end which receives a diffusion target, a second cavity within a second end which receives a dopant source for diffusion, and a diffusion port disposed between the diffusion target and the dopant source, wherein the diffusion port provides fluid communication between the first cavity and the second cavity.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: June 21, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Gi-bum Kim, Taek Kim, Jae-min Myoung, Min-chang Jeong
  • Publication number: 20100116780
    Abstract: A method for patterning nanowires on a substrate. The method includes procedures of preparing a substrate having a patterned sacrificial layer of barium fluoride thereon; growing nanowires on an entire surface of the resultant substrate including the patterned sacrificial layer; and removing the patterned sacrificial layer using a solvent to remove part of the nanowires on the patterned sacrificial layer such that part of the nanowires in direct contact with the substrate remains on the substrate to thereby form a nanowire pattern.
    Type: Application
    Filed: January 6, 2009
    Publication date: May 13, 2010
    Inventors: Jae Min Myoung, Jyoti Prakash Kar
  • Publication number: 20070272990
    Abstract: According to an exemplary embodiment of the present invention, a diffusion tube includes a diffusion housing which includes a first cavity within a first end which receives a diffusion target, a second cavity within a second end which receives a dopant source for diffusion, and a diffusion port disposed between the diffusion target and the dopant source, wherein the diffusion port provides fluid communication between the first cavity and the second cavity.
    Type: Application
    Filed: February 9, 2007
    Publication date: November 29, 2007
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Gi-bum KIM, Taek KIM, Jae-min MYOUNG, Min-chang JEONG
  • Patent number: 7063986
    Abstract: A 3 group–5 group compound ferromagnetic semiconductor, comprising one material ‘A’ selected from the group of Ga, Al and In and one material ‘B’ selected from the group consisting of N and P, wherein one material ‘C’ selected from the group consisting of Mn, Mg, Co, Fe, Ni, Cr and V is doped as a material for substituting the material ‘A’, the compound semiconductor has a single phase as a whole. The ferromagnetic semiconductor can be fabricated by a plasma-enhance molecular beam epitaxy growing method and since it shows the ferromagnetic characteristics at a room temperature, it can be applied as various spin electron devices.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: June 20, 2006
    Assignee: Korea Institute of Science and Technology
    Inventors: Woo Young Lee, Suk Hee Han, Joon Yeon Chang, Hi Jung Kim, Jung Mi Lee, Jae Min Myoung
  • Publication number: 20040041217
    Abstract: A 3 group-5 group compound ferromagnetic semiconductor, comprising one material ‘A’ selected from the group of Ga, Al and In and one material ‘B’ selected from the group consisting of N and P, wherein one material ‘C’ selected from the group consisting of Mn, Mg, Co, Fe, Ni, Cr and V is doped as a material for substituting the material ‘A’, the compound semiconductor has a single phase as a whole. The ferromagnetic semiconductor can be fabricated by a plasma-enhance molecular beam epitaxy growing method and since it shows the ferromagnetic characteristics at a room temperature, it can be applied as various spin electron devices.
    Type: Application
    Filed: January 14, 2003
    Publication date: March 4, 2004
    Applicant: Korea Institute of Science and Technology
    Inventors: Woo Young Lee, Suk Hee Han, Joon Yeon Chang, Hi Jung Kim, Jung Mi Lee, Jae Min Myoung