Patents by Inventor Jae-Soo CHAUNG

Jae-Soo CHAUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR PACKAGE AND THREE-DIMENSIONAL SEMICONDUCTOR PACKAGE INCLUDING THE SAME
    Publication number: 20160315029
    Abstract: There is provided a semiconductor package including: a semiconductor chip; and an extension die provided on the semiconductor chip, wherein the semiconductor chip includes a heating point configured to generate a temperature greater than or equal to a pre-determined reference temperature in the semiconductor chip, the heating point provided in a center region of the extension die
    Type: Application
    Filed: February 9, 2016
    Publication date: October 27, 2016
    Inventors: Dong-Han LEE, Je-Gil MOON, Wook KIM, Min-Seon AHN, Yun-Hyeok IM, Kee-Moon CHUN, Jae-Soo CHAUNG, Bum-Keun CHOI, Jung-Su HA