Patents by Inventor Ja Eun Yun

Ja Eun Yun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit package system with overhang die
    Patent number: 8956914
    Abstract: An integrated circuit package system comprising: forming a substrate having a solder mask with a support structure formed from the solder mask; mounting a first integrated circuit device over the support structure; connecting the substrate and the first integrated circuit device; and encapsulating the first integrated circuit device and the support structure.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: February 17, 2015
    Assignee: STATS ChipPAC Ltd.
    Inventors: Ja Eun Yun, Jong Wook Ju
  • Integrated circuit package system with package integration
    Patent number: 8067275
    Abstract: An integrated circuit package system comprising: providing a base substrate; attaching a base integrated circuit die over the base substrate; forming a support over the base substrate near only one edge of the base substrate; and attaching a stack substrate over the support and the base integrated circuit die.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: November 29, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: WonJun Ko, Jong Wook Ju, SeungYong Chai, Taeg Ki Lim, Ja Eun Yun
  • Integrated circuit package system with thermo-mechanical interlocking substrates
    Patent number: 7656017
    Abstract: An integrated circuit package system includes providing a plurality of substrates; inserting a receptor in one of the substrates, the receptor held in and not extending through the one of the substrates; inserting a conductive post in another of the substrates; mounting the one of the substrates and the another of the substrates over one another with the conductive post engaging the receptor to thermally interlock without a separate bonding material; and mounting an integrated circuit mounted on the one of the substrates or the another of the substrates.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: February 2, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Hyun Joung Kim, Taeg Ki Lim, Ja Eun Yun
  • INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE INTEGRATION
    Publication number: 20090155961
    Abstract: An integrated circuit package system comprising: providing a base substrate; attaching a base integrated circuit die over the base substrate; forming a support over the base substrate near only one edge of the base substrate; and attaching a stack substrate over the support and the base integrated circuit die.
    Type: Application
    Filed: December 17, 2007
    Publication date: June 18, 2009
    Inventors: WonJun Ko, Jong Wook Ju, SeungYong Chai, Taeg Ki Lim, Ja Eun Yun
  • INTEGRATED CIRCUIT PACKAGE SYSTEM WITH OVERHANG DIE
    Publication number: 20090001613
    Abstract: An integrated circuit package system comprising: forming a substrate having a solder mask with a support structure formed from the solder mask; mounting a first integrated circuit device over the support structure; connecting the substrate and the first integrated circuit device; and encapsulating the first integrated circuit device and the support structure.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 1, 2009
    Inventors: Ja Eun Yun, Jong Wook Ju
  • INTEGRATED CIRCUIT PACKAGE SYSTEM WITH THERMO-MECHANICAL INTERLOCKING SUBSTRATES
    Publication number: 20080142943
    Abstract: An integrated circuit package system includes providing a plurality of substrates; inserting a receptor in one of the substrates, the receptor held in and not extending through the one of the substrates; inserting a conductive post in another of the substrates; mounting the one of the substrates and the another of the substrates over one another with the conductive post engaging the receptor to thermally interlock without a separate bonding material; and mounting an integrated circuit mounted on the one of the substrates or the another of the substrates.
    Type: Application
    Filed: December 10, 2007
    Publication date: June 19, 2008
    Inventors: Hyun Joung Kim, Taeg Ki Lim, Ja Eun Yun