Patents by Inventor Jaeyoo Jung
Jaeyoo Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240152277Abstract: Proactive traffic shaping is used to generate and transmit proactive QFULL messages that are selectively sent to hosts that are generating large numbers of IO operations with lower service levels in instances where a compute node is experiencing high IO volume. By sending proactive QFULL messages only to hosts that are sending IO operations with lower service levels, it is possible to cause the lower priority IO operations to be directed by the hosts to other compute nodes within the storage system, to thereby balance IO operations between compute nodes and enable higher priority IO operations to be serviced with lower latency. When a low priority IO operation arrives, a determination is made as to the depth of the queue. If the number of IO operations in the queue is above a threshold, and IOS are trending upward, a QFULL message is sent to the low priority IO initiator.Type: ApplicationFiled: November 5, 2022Publication date: May 9, 2024Inventors: Benjamin A. F. Randolph, Narasimha Challa, Jaeyoo Jung
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Patent number: 11886711Abstract: An apparatus comprises at least one processing device. The at least one processing device is configured to identify at least one logical storage device that has a first service level objective and is exhibiting a deficiency in one or more performance metrics, to identify one or more additional logical storage devices each having a second service level objective lower than the first service level objective and not exhibiting a deficiency in the one or more performance metrics, to generate at least one false-positive signal specifying the one or more additional logical storage devices as each exhibiting a deficiency in the one or more performance metrics, and to provide the at least one false-positive signal to at least one host device. The at least one host device is configured to respond to the at least one false-positive signal by throttling input-output operations for the one or more additional logical storage devices.Type: GrantFiled: June 16, 2022Date of Patent: January 30, 2024Assignee: Dell Products L.P.Inventors: Sanjib Mallick, Vinay G. Rao, Jaeyoo Jung, Arieh Don
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Patent number: 11886523Abstract: Techniques for training and/or using a machine learning (ML) algorithm to generate search results are disclosed. An ML algorithm is configured (i) to identify a search starting event and a search terminating event for a search session, where the search session includes multiple navigations across multiple different webpages, and (ii) to derive a dynamic score for the search session, where the dynamic score reflects whether the search session successfully identified an end result that was initially unknown at a time when the search starting event occurred. The trained ML algorithm can then be used during later search sessions to promote better search results and help users identify end targets or results in a faster and more intuitive manner.Type: GrantFiled: April 19, 2022Date of Patent: January 30, 2024Assignee: DELL PRODUCTS L.P.Inventors: Ming Qian, Jaeyoo Jung
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Publication number: 20230409199Abstract: An apparatus comprises at least one processing device. The at least one processing device is configured to identify at least one logical storage device that has a first service level objective and is exhibiting a deficiency in one or more performance metrics, to identify one or more additional logical storage devices each having a second service level objective lower than the first service level objective and not exhibiting a deficiency in the one or more performance metrics, to generate at least one false-positive signal specifying the one or more additional logical storage devices as each exhibiting a deficiency in the one or more performance metrics, and to provide the at least one false-positive signal to at least one host device. The at least one host device is configured to respond to the at least one false-positive signal by throttling input-output operations for the one or more additional logical storage devices.Type: ApplicationFiled: June 16, 2022Publication date: December 21, 2023Inventors: Sanjib Mallick, Vinay G. Rao, Jaeyoo Jung, Arieh Don
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Publication number: 20230334104Abstract: Techniques for training and/or using a machine learning (ML) algorithm to generate search results are disclosed. An ML algorithm is configured (i) to identify a search starting event and a search terminating event for a search session, where the search session includes multiple navigations across multiple different webpages, and (ii) to derive a dynamic score for the search session, where the dynamic score reflects whether the search session successfully identified an end result that was initially unknown at a time when the search starting event occurred. The trained ML algorithm can then be used during later search sessions to promote better search results and help users identify end targets or results in a faster and more intuitive manner.Type: ApplicationFiled: April 19, 2022Publication date: October 19, 2023Inventors: Ming Qian, Jaeyoo Jung
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Publication number: 20230315518Abstract: Individual processors of a storage system are analyzed to determine which thread types are most important for servicing a run workload, where importance is measured by number of CPU cycles used. Permutations of differentiated access to CPU cycles are calculated, where the most important thread types are provided with greater access to CPU cycles than thread types of lesser importance. The permutations are tested with the same run workload to determine which permutation yields the greatest average IOPS. The thread scheduler for the processor is configured with that permutation.Type: ApplicationFiled: March 31, 2022Publication date: October 5, 2023Applicant: Dell Products L.P.Inventors: Jaeyoo Jung, Peter Linden, Robert Lucey, Wednesday Wolf
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Patent number: 11620054Abstract: An apparatus comprises a processing device configured to identify a number of outstanding input-output (IO) operations corresponding to at least one target of a storage system, wherein the identifying is performed periodically at designated time intervals. The processing device is further configured to determine whether the number of outstanding IO operations is trending upward and exceeds a threshold over a plurality of the designated time intervals. At least one message indicating a queue full condition is generated responsive to an affirmative determination that the number of outstanding IO operations is trending upward and an affirmative determination that the number of outstanding IO operations exceeds the threshold. The at least one message is sent to one or more host devices associated with one or more initiators corresponding to the at least one target of the storage system.Type: GrantFiled: April 21, 2022Date of Patent: April 4, 2023Assignee: Dell Products L.P.Inventors: Jaeyoo Jung, Narasimha R. Challa, Sanjib Mallick
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Patent number: 11513690Abstract: Techniques for determining service levels may include receiving an I/O operation at a target port of a data storage system, where the I/O operation is sent from an initiator port of a host and directed to a storage object in a first storage group. The initiator port may be included in a first initiator group and the target port may be included in a first port group. The I/O operation may be assigned a service level using a table of a service levels specified for different triples. Each triple may identify an initiator groups, a storage group and a port group. Assigning the service level may include determining a first of the triples that matches the first storage group, the first initiator group and the first port group, wherein the first triple is associated with the service level.Type: GrantFiled: July 10, 2020Date of Patent: November 29, 2022Assignee: EMC IP Holding Company LLCInventors: Jaeyoo Jung, Narasimha R. Challa, Benjamin A. Randolph
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Patent number: 11327664Abstract: A portion of the shared global memory of a storage array is allocated for write-only blocks. Writes to a same-block of a production device may be accumulated in the allocated portion of memory. Temporal sequencing may be associated with each accumulated version of the same-block. When idle processing resources become available, the oldest group of same-blocks may be consolidated based on the temporal sequencing. The consolidated block may then be destaged to cache slots or managed drives. A group of same-blocks may also be consolidated in response to a read command.Type: GrantFiled: August 4, 2017Date of Patent: May 10, 2022Assignee: Dell Products L.P.Inventors: Jaeyoo Jung, Ramesh Doddaiah, Venkata Khambam, Earl Medeiros, Richard Trabing
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Patent number: 11262925Abstract: Techniques for configuring paths for transmitting I/O operations may include: configuring a first path over which logical devices are exposed over a first port of a data storage system to a second port of a host, wherein the logical devices include a first logical device having a first service level objective and a second logical device having a second service level objective denoting a lower service level than the first service level objective; determining whether there is a service level objective violation of the first service level for the first logical device; and responsive to determining there is a service level objective violation for the first logical device, performing first processing that exposes the first logical device and the second logical device over different ports of the data storage system. Masking information may indicate which logical devices are exposed over which data storage system ports to which host ports.Type: GrantFiled: January 8, 2020Date of Patent: March 1, 2022Assignee: EMC IP Holding Company LLCInventors: Violet S. Beckett, Jaeyoo Jung, Arieh Don
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Patent number: 11252015Abstract: Described herein are systems and techniques for determining when excessive I/O response times are not the fault of a storage port, but rather are caused by other factors or components on a storage network, for example, over-utilization of a host port. For one or more host ports and/or storage ports, a payload idle time (PIT) may be determined for each I/O operation, the PIT being the amount of time during which a storage port is waiting for a host port to be ready to send or receive data of the respective I/O operation. It may be determined whether one or more of the PITs includes an excessive idle time (EIT), where the EIT may be an amount of the PIT that is more than a predefined acceptable amount of time. The cause of the EIT may be determined.Type: GrantFiled: January 29, 2019Date of Patent: February 15, 2022Assignee: EMC IP Holding Company LLCInventors: Michael J. Scharland, Jaeyoo Jung, Arieh Don
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Publication number: 20220011942Abstract: Techniques for determining service levels may include receiving an I/O operation at a target port of a data storage system, where the I/O operation is sent from an initiator port of a host and directed to a storage object in a first storage group. The initiator port may be included in a first initiator group and the target port may be included in a first port group. The I/O operation may be assigned a service level using a table of a service levels specified for different triples. Each triple may identify an initiator groups, a storage group and a port group. Assigning the service level may include determining a first of the triples that matches the first storage group, the first initiator group and the first port group, wherein the first triple is associated with the service level.Type: ApplicationFiled: July 10, 2020Publication date: January 13, 2022Applicant: EMC IP Holding Company LLCInventors: Jaeyoo Jung, Narasimha R. Challa, Benjamin A. Randolph
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Patent number: 11200169Abstract: A processing node of a storage system may determine that a host system is implementing a cache-slot aware, round-robin IO distribution algorithm (CA-RR). The processing node may be configured to determine when a sufficient number of sequential IOs will be received to consume a cache slot of the a processing node. If the processing node knows that the host system is implementing CA-RR, then, in response to determining the sufficient number, the processing node may send a communication informing the next processing node about the sequential cache slot hit. If the sequential IO operation(s) are read operation(s), the next processing node may prefetch at least a cache-slot worth of next consecutive data portions. If the sequential IO operation(s) are write operation(s), then the next processing node may request allocation of one or more local cache slots for the forthcoming sequential write operations.Type: GrantFiled: January 30, 2020Date of Patent: December 14, 2021Assignee: EMC IP Holding Company LLCInventors: Jack Fu, Jaeyoo Jung, Arieh Don
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Publication number: 20210240621Abstract: A processing node of a storage system may determine that a host system is implementing a cache-slot aware, round-robin IO distribution algorithm (CA-RR). The processing node may be configured to determine when a sufficient number of sequential IOs will be received to consume a cache slot of the a processing node. If the processing node knows that the host system is implementing CA-RR, then, in response to determining the sufficient number, the processing node may send a communication informing the next processing node about the sequential cache slot hit. If the sequential IO operation(s) are read operation(s), the next processing node may prefetch at least a cache-slot worth of next consecutive data portions. If the sequential IO operation(s) are write operation(s), then the next processing node may request allocation of one or more local cache slots for the forthcoming sequential write operations.Type: ApplicationFiled: January 30, 2020Publication date: August 5, 2021Applicant: EMC IP Holding Company LLCInventors: Jack Fu, Jaeyoo Jung, Arieh Don
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Publication number: 20210208805Abstract: Techniques for configuring paths for transmitting I/O operations may include: configuring a first path over which logical devices are exposed over a first port of a data storage system to a second port of a host, wherein the logical devices include a first logical device having a first service level objective and a second logical device having a second service level objective denoting a lower service level than the first service level objective; determining whether there is a service level objective violation of the first service level for the first logical device; and responsive to determining there is a service level objective violation for the first logical device, performing first processing that exposes the first logical device and the second logical device over different ports of the data storage system. Masking information may indicate which logical devices are exposed over which data storage system ports to which host ports.Type: ApplicationFiled: January 8, 2020Publication date: July 8, 2021Applicant: EMC IP Holding Company LLCInventors: Violet S. Beckett, Jaeyoo Jung, Arieh Don
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Patent number: 11048638Abstract: A host system may be cache-slot aware such that the host system can distribute IOs to processing nodes on a storage system according to cache slot boundaries. A multi-path driver of the host system may determine the cache slot size from one or more communications exchanged with the storage system. The multi-path driver may transition between processing nodes according to slot cache slot boundaries. For IO operations having data portions smaller than the cache slot size, the MP driver may direct multiple IO operations to a same processing node until the collective size of data portions fills a cache slot. For IO operations having a data portion larger than the cache slot, the MP driver may divide the IO operation into sequential IO operations having data portions of a same size as a cache slot, and may transition between processing nodes for each IO operation or a multiple thereof.Type: GrantFiled: February 3, 2020Date of Patent: June 29, 2021Assignee: EMC IP Holding Company LLCInventors: Jack Fu, Jaeyoo Jung, Arieh Don
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Patent number: 10938947Abstract: Techniques for processing I/O operations may include: receiving an I/O operation directed to a logical device having an associated service level objective with a target I/O response time; performing first processing that determines an estimated response time for the I/O operation, and determining, based on the estimated response time for the I/O operation and the associated service level objective, whether to delay the I/O operation by an additional amount of time thereby increasing a measured response time for the I/O operation by the additional amount. The first processing may include determining a fixed baseline amount of time for the I/O operation; determining a cumulative amount of time estimated to service pending I/O operation queued for service prior to the I/O operation; and determining an expected service time estimated for servicing the I/O operation. Moving averages maintained for different I/O types and sizes may be used in determining I/O service times.Type: GrantFiled: January 11, 2019Date of Patent: March 2, 2021Assignee: EMC IP Holding Company LLCInventors: Dharmesh J. Desai, Raghuram Adabala, Sichao Zhu, Arieh Don, Jaeyoo Jung
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Patent number: 10852952Abstract: Techniques for processing I/O operations may include: selecting a logical device having at least one snapshot on a data storage system; sending, from a host to the data storage system, a first hint for a first write I/O operation directed to a first location on the logical device, wherein said sending the first hint is performed prior to the host sending the first write I/O operation to the data storage system; and responsive to receiving the first hint regarding the first write I/O operation to the first location of the logical device having at least one snapshot, performing preprocessing for the first write I/O operation. Hints may also be sent for I/O operations directed to a target device linked to a snapshot of the logical device. The data storage system may perform preprocessing for the I/O operations directed to the target device linked to the snapshot.Type: GrantFiled: July 23, 2019Date of Patent: December 1, 2020Assignee: EMC IP Holding Company LLCInventors: Jaeyoo Jung, Michael Ferrari, Arieh Don
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Patent number: 10802722Abstract: Techniques for processing I/O operations may include: detecting, at a host, a sequence of I/O operations to be sent from the host to a data storage system, wherein each of the I/O operations of the sequence specifies a target address included in a first logical address subrange of a first logical device; sending, from the host, the sequence of I/O operations to a same target port of the data storage system, wherein each of the I/O operations of the sequence includes an indicator denoting whether resources used by the same target port in connection with processing said each I/O operation are to be released subsequent to completing processing of said each I/O operation; receiving the sequence of I/O operations at the same target port of the data storage system; and processing the sequence of I/O operations.Type: GrantFiled: August 2, 2019Date of Patent: October 13, 2020Assignee: EMC IP Holding Company LLCInventors: Jaeyoo Jung, Ramesh Doddaiah, Owen Martin, Arieh Don
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Patent number: 10747464Abstract: Techniques for migrating data of a logical device from a source to a target system may include: obtaining a map indicating unused data portions of a logical device; issuing read commands from the target system to the source system to only read data from the source copy of the logical device for logical addresses that are not marked in the map as unused data portions; receiving the read data at the target system; writing the read data to second logical addresses of the target copy of the logical device on the target system; and marking logical addresses indicated by the map as corresponding to the unused data portions. The source system may also determine whether all data of a received read request that reads data from the logical device is included in an unused data portion and if so, return no read data and a specialized error condition.Type: GrantFiled: October 25, 2018Date of Patent: August 18, 2020Assignee: EMC IP Holding Company LLCInventors: Subin George, Deepak Vokaliga, Jaeyoo Jung, Arieh Don