Patents by Inventor Jagadeesh Krishnan

Jagadeesh Krishnan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9393715
    Abstract: The invention provides novel railroad ties manufactured from novel composite materials that possess excellent physical and performance characteristics matching or exceeding existing concrete RRTs. The RRTs of the invention can be readily produced from widely available, low cost raw materials by a process suitable for large-scale production with improved energy consumption and more desirable carbon footprint and minimal environmental impact.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: July 19, 2016
    Assignee: Solidia Technologies, Inc.
    Inventors: Jagadeesh Krishnan, Jitendra Jain, Deepak Ravikumar, Devin Patten, John Kuppler, Kenneth Smith, Xudong Hu
  • Publication number: 20140263683
    Abstract: The invention provides novel railroad ties manufactured from novel composite materials that possess excellent physical and performance characteristics matching or exceeding existing concrete RRTs. The RRTs of the invention can be readily produced from widely available, low cost raw materials by a process suitable for large-scale production with improved energy consumption and more desirable carbon footprint and minimal environmental impact.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Inventors: Jagadeesh Krishnan, Jitendra Jain, Deepak Ravikumar, Devin Patten, John Kuppler, Kenneth Smith, Xudong Hu
  • Publication number: 20090097178
    Abstract: Methods and apparatus to detect an over-current in switching circuits are described. An example method to detect an over-current in a switching circuit includes randomly selecting a sensor from a plurality of sensors operatively coupled to an output stage of the switching circuit; detecting a first voltage via the randomly selected sensor; and comparing the first voltage to a reference voltage to generate a signal, wherein the signal indicates a status of the output stage of the switching circuit.
    Type: Application
    Filed: October 12, 2007
    Publication date: April 16, 2009
    Applicant: Texas Instruments Incorporated
    Inventors: Jagadeesh Krishnan, Angelo W. Pereira, Rajkumar Jayaraman, Paul H. Fontaine
  • Patent number: 7498879
    Abstract: The summing comparator includes: a first integrator; a second integrator for receiving an output of the first integrator; and a comparator for switching when the output of the first integrator is greater than the output of the second integrator. The outputs of the first and second integrators are directly compared by the comparator without the necessity of a summing amplifier.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: March 3, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Jagadeesh Krishnan, Srinath M. Ramaswamy, Gangadhar Burra
  • Patent number: 7414471
    Abstract: A closed loop amplifier adapted to be directly connected to a battery having a battery voltage for powering the amplifier. The amplifier includes an amplifier stage having a node for receiving a control voltage for controlling a common mode voltage of the stage, a digital voltage indicator for generating a digital value corresponding to the battery voltage, and a common mode voltage supply providing the control voltage corresponding to the digital value.
    Type: Grant
    Filed: June 6, 2006
    Date of Patent: August 19, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Jagadeesh Krishnan, Srinath M Ramaswamy, Gangadhar Burra
  • Publication number: 20070279126
    Abstract: A closed loop amplifier adapted to be directly connected to a battery having a battery voltage for powering the amplifier. The amplifier includes an amplifier stage having a node for receiving a control voltage for controlling a common mode voltage of the stage, a digital voltage indicator for generating a digital value corresponding to the battery voltage, and a common mode voltage supply providing the control voltage corresponding to the digital value. In a preferred embodiment, a Class-D amplifier is powered by a power supply providing power by way of a power supply voltage node and a ground node, the amplifier having improved common-mode voltage control. A first integrator stage receives an input signal and provides an output signal, the integrator stage having a first common-mode reference voltage applied thereto for control of the common-mode voltage of the integrator stage.
    Type: Application
    Filed: June 6, 2006
    Publication date: December 6, 2007
    Applicant: TEXAS INSTRUMENTS, INCOPORATED
    Inventors: Jagadeesh Krishnan, Srinath M. Ramaswamy, Gangadhar Burra
  • Patent number: 7279966
    Abstract: An amplifier system in accordance with an aspect of the present invention comprises a switching amplifier that drives a load with a pulse-width modulated (PWM) output signal that varies between first and second rails based on a first control input signal, and a common mode supply that provides a switching signal that varies between third and fourth rails to maintain a common mode voltage of the load at a level that is between the first and second rails.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: October 9, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Jagadeesh Krishnan, Srinath Mathur Ramaswamy, Gangadhar Burra
  • Publication number: 20070229159
    Abstract: Multi-mode class-D amplifiers are disclosed. An example multi-mode class-D amplifier circuit having an analog input and a digital input disclosed herein comprises a single-mode class-D amplifier having an amplifier input, a smoothing filter having a filter input and a filter output, wherein the filter output is electronically coupled to the amplifier input, and a multiplexer electronically coupled to the filter input to select between at least one of the analog input and the digital input of the multi-mode class-D amplifier circuit.
    Type: Application
    Filed: March 27, 2007
    Publication date: October 4, 2007
    Inventors: Jagadeesh Krishnan, Paul H. Fontaine
  • Patent number: 7262658
    Abstract: A Class-D amplifier system may include an input stage that includes an Nth order filter, where N>1. The input stage filters an input signal to provide a filtered output signal, an input of the input stage being configured to receive the input signal as a digital pulse-width-modulated (PWM) signal. A comparator provides a quantized output signal based on the filtered output signal. An output stage is connected between a first voltage rail and a second voltage rail. The output stage provides a switching output signal at an output that varies between the first voltage rail and the second voltage rail based on the quantized output signal. A feedback path connects the output of the output stage with the input of the input stage, such that the Nth order filter compensates for variations in at least one of the first voltage rail and the second voltage rail.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: August 28, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Srinath Mathur Ramaswamy, Jagadeesh Krishnan, Gangadhar Burra
  • Publication number: 20070024366
    Abstract: The summing comparator includes: a first integrator; a second integrator for receiving an output of the first integrator; and a comparator for switching when the output of the first integrator is greater than the output of the second integrator. The outputs of the first and second integrators are directly compared by the comparator without the necessity of a summing amplifier.
    Type: Application
    Filed: March 27, 2006
    Publication date: February 1, 2007
    Inventors: Jagadeesh Krishnan, Srinath Ramaswamy, Gangadhar Burra
  • Publication number: 20070024365
    Abstract: A Class-D amplifier system may include an input stage that includes an Nth order filter, where N>1. The input stage filters an input signal to provide a filtered output signal, an input of the input stage being configured to receive the input signal as a digital pulse-width-modulated (PWM) signal. A comparator provides a quantized output signal based on the filtered output signal. An output stage is connected between a first voltage rail and a second voltage rail. The output stage provides a switching output signal at an output that varies between the first voltage rail and the second voltage rail based on the quantized output signal. A feedback path connects the output of the output stage with the input of the input stage, such that the Nth order filter compensates for variations in at least one of the first voltage rail and the second voltage rail.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Srinath Ramaswamy, Jagadeesh Krishnan, Gangadhar Burra
  • Publication number: 20070024361
    Abstract: An amplifier system in accordance with an aspect of the present invention comprises a switching amplifier that drives a load with a pulse-width modulated (PWM) output signal that varies between first and second rails based on a first control input signal, and a common mode supply that provides a switching signal that varies between third and fourth rails to maintain a common mode voltage of the load at a level that is between the first and second rails.
    Type: Application
    Filed: July 29, 2005
    Publication date: February 1, 2007
    Inventors: Jagadeesh Krishnan, Srinath Ramaswamy, Gangadhar Burra