Patents by Inventor Jagadheswaran Rajendran

Jagadheswaran Rajendran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9722546
    Abstract: A bias circuit for applying bias current to a low quiescent current amplifier includes first and second transistors and a transistor pair circuit. The first transistor is connected to a supply bias voltage source and an auxiliary bias voltage source, and is controlled by a bias voltage output from the auxiliary bias voltage source, the first transistor acting as a current source. The second transistor is connected to the supply bias voltage source and an output of the first transistor, and is controlled by the output of the first transistor to selectively buffer supply bias current from the supply bias voltage source provided to the low quiescent current amplifier via a bias resistor. The transistor pair circuit includes third and fourth transistors connected in series, one of the third and fourth transistors is also connected in parallel with a dividing resistor, the transistor pair circuit acting as a voltage source.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: August 1, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Jagadheswaran Rajendran, Yut Hoong Chow
  • Publication number: 20170033748
    Abstract: A bias circuit for applying bias current to a low quiescent current amplifier includes first and second transistors and a transistor pair circuit. The first transistor is connected to a supply bias voltage source and an auxiliary bias voltage source, and is controlled by a bias voltage output from the auxiliary bias voltage source, the first transistor acting as a current source. The second transistor is connected to the supply bias voltage source and an output of the first transistor, and is controlled by the output of the first transistor to selectively buffer supply bias current from the supply bias voltage source provided to the low quiescent current amplifier via a bias resistor. The transistor pair circuit includes third and fourth transistors connected in series, one of the third and fourth transistors is also connected in parallel with a dividing resistor, the transistor pair circuit acting as a voltage source.
    Type: Application
    Filed: July 29, 2015
    Publication date: February 2, 2017
    Inventors: Jagadheswaran Rajendran, Yut Hoong Chow