Abstract: Defect location accuracy can be increased using shape based grouping with pattern-based defect centering. Design based grouping of defects on a wafer can be performed. A spatial distribution of the defects around at least one structure on the wafer, such as a predicted hot spot, can be determined. At least one design based defect property for a location around the structure can be determined. The defects within an x-direction threshold and a y-direction threshold of the structure may be prioritized.

Abstract: Systems and methods for determining location of critical dimension (CD) measurement or inspection are disclosed. Real-time selection of locations to take critical dimension measurements based on potential impact of critical dimension variations at the locations can be performed. The design of a semiconductor device also can be used to predict locations that may be impacted by critical dimension variations. Based on an ordered location list, which can include ranking or criticality, critical dimension can be measured at selected locations. Results can be used to refine a critical dimension location prediction model.

Abstract: A method for providing a trained defect candidate detection algorithm includes: acquiring an optical image of a processed wafer; receiving a multi-beam scanning electron microscope (MSEM) image; covering a portion of the processed wafer corresponding to a portion of the optical image; and training a defect candidate detection algorithm based on the optical image and a result of an analysis of the MSEM image with regard to defect candidates. A wafer inspection method and an optical inspector using the trained defect candidate detection algorithm are disclosed.

Abstract: Wafer inspection methods and systems include converting an acquired image to a polygonal chain representation. The polygonal chain representation is converted to feature vectors. The feature vectors are compared to further feature vectors obtained based on design data.

Abstract: A method includes controlling a multi-scanning electron microscope, mSEM, to capture a first image of a wafer attached to a motorized handling stage while the motorized handling stage is in a first position. The first image includes at least a part of a notch of the wafer. The method also includes determining a radial axis of the wafer based on the first image, and controlling the motorized handling stage to shift the wafer along the radial axis by half a diameter of the wafer so that the motorized handling stage is in a second position. The method further includes controlling the mSEM to capture a second image of the wafer while the motorized handling stage is in the second position. The second image includes wafer structures.

Abstract: An optical tool is used to define critical regions in a wafer including a plurality of dies manufactured with different process parameters. An mSEM is used to scan the critical regions.

Abstract: Methods and systems for shape metric based scoring of wafer locations are provided. One method includes selecting shape based grouping (SBG) rules for at least two locations on a wafer. For one of the wafer locations, the selecting step includes modifying distances between geometric primitives in a design for the wafer with metrology data for the one location and determining metrical complexity (MC) scores for SBG rules associated with the geometric primitives in a field of view centered on the one location based on the distances. The selecting step also includes selecting one of the SBG rules for the one location based on the MC scores. The method also includes sorting the at least two locations on the wafer based on the SBG rule selected for the at least two locations.

Abstract: Techniques are provided that can select defects based on criticality of design pattern as well as defect attributes for process window qualification (PWQ). Defects are sorted into categories based on process conditions and similarity of design. Shape based grouping can be performed on the random defects. Highest design based grouping scores can be assigned to the bins, which are then sorted. Particular defects can be selected from the bins. These defects may be reviewed.

Abstract: Methods and systems for shape metric based scoring of wafer locations are provided. One method includes selecting shape based grouping (SBG) rules for at least two locations on a wafer. For one of the wafer locations, the selecting step includes modifying distances between geometric primitives in a design for the wafer with metrology data for the one location and determining metrical complexity (MC) scores for SBG rules associated with the geometric primitives in a field of view centered on the one location based on the distances. The selecting step also includes selecting one of the SBG rules for the one location based on the MC scores. The method also includes sorting the at least two locations on the wafer based on the SBG rule selected for the at least two locations.

Abstract: Processes to generate regions of interest for critical dimension uniformity measurement are disclosed. A pattern description based on historical data or a coordinate may be used as input. A pattern of interest can be determined, and then a region of interest can be determined. Instructions can be sent to a wafer inspection tool to image the region of interest on the semiconductor wafer.

Abstract: Techniques are provided that can select defects based on criticality of design pattern as well as defect attributes for process window qualification (PWQ). Defects are sorted into categories based on process conditions and similarity of design. Shape based grouping can be performed on the random defects. Highest design based grouping scores can be assigned to the bins, which are then sorted. Particular defects can be selected from the bins. These defects may be reviewed.

Abstract: Defect location accuracy can be increased using shape based grouping with pattern-based defect centering. Design based grouping of defects on a wafer can be performed. A spatial distribution of the defects around at least one structure on the wafer, such as a predicted hot spot, can be determined. At least one design based defect property for a location around the structure can be determined. The defects within an x-direction threshold and a y-direction threshold of the structure may be prioritized.

Abstract: Systems and methods for determining location of critical dimension (CD) measurement or inspection are disclosed. Real-time selection of locations to take critical dimension measurements based on potential impact of critical dimension variations at the locations can be performed. The design of a semiconductor device also can be used to predict locations that may be impacted by critical dimension variations. Based on an ordered location list, which can include ranking or criticality, critical dimension can be measured at selected locations. Results can be used to refine a critical dimension location prediction model.