Patents by Inventor Jaideep Banerjee

Jaideep Banerjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11353910
    Abstract: A bandgap voltage regulator includes a proportional-to-absolute-temperature (PTAT) circuit, an amplifier, and a driver circuit. The PTAT circuit can include various transistors that output a corresponding control voltage. The amplifier generates another control voltage to compensate base-current variations associated with the transistors of the PTAT circuit. The control voltage is generated by the amplifier based on the control voltage outputted by the PTAT circuit, and one of a base-emitter voltage associated with a transistor of the PTAT circuit, a scaled down version of the control voltage outputted by the amplifier, and a scaled down version of the base-emitter voltage. The driver circuit outputs, based on a supply voltage and the control voltages outputted by the PTAT circuit, a reference voltage for driving a functional circuit.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: June 7, 2022
    Assignee: NXP B.V.
    Inventors: Sanjay Kumar Wadhwa, Ricardo Pureza Coimbra, Jaideep Banerjee
  • Patent number: 10763855
    Abstract: A circuit includes a high voltage (HV) transistor having a first current electrode, a second current electrode, and a control electrode coupled to receive a control signal. The HV transistor is configured and arranged to be non-conductive when the control signal is at a first state and conductive when the control signal is at a second state. A low voltage (LV) transistor is coupled to the first current electrode of the HV transistor. An HV pad is coupled to the second current electrode of the HV transistor. An operating voltage rating of the HV pad exceeds an operating voltage rating of the LV transistor. A secondary electrostatic discharge protection device is coupled between the second current electrode of the HV transistor and a voltage supply terminal.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: September 1, 2020
    Assignee: NXP USA, INC.
    Inventors: Ashutosh Jain, Michael A Stockinger, Stefano Pietri, Jaideep Banerjee, Ateet Omer
  • Patent number: 9030186
    Abstract: A bandgap voltage reference and voltage regulator system includes a bandgap voltage reference circuit and a voltage regulator circuit that share a single, common amplifier. The amplifier acts as a gain stage for the reference circuit and as an error amplifier for a driver stage of the regulator circuit. The regulator circuit has an input reference generated by the reference circuit, and the reference circuit acts as a load to the driver stage, obviating the need for a bias resistance network. By sharing the amplifier and obviating the need for a resistance network, the area and overall quiescent current of the system are reduced. The system can be implemented in CMOS/BiCMOS technology and is suited for low power applications.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: May 12, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Rakesh K. Gupta, Jaideep Banerjee, Sanjay K. Wadhwa
  • Publication number: 20140015509
    Abstract: A bandgap voltage reference and voltage regulator system includes a bandgap voltage reference circuit and a voltage regulator circuit that share a single, common amplifier. The amplifier acts as a gain stage for the reference circuit and as an error amplifier for a driver stage of the regulator circuit. The regulator circuit has an input reference generated by the reference circuit, and the reference circuit acts as a load to the driver stage, obviating the need for a bias resistance network. By sharing the amplifier and obviating the need for a resistance network, the area and overall quiescent current of the system are reduced. The system can be implemented in CMOS/BiCMOS technology and is suited for low power applications.
    Type: Application
    Filed: July 12, 2012
    Publication date: January 16, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Rakesh K. Gupta, Jaideep Banerjee, Sanjay K. Wadhwa
  • Patent number: 7414462
    Abstract: A differential receiver circuit receives a differential input signal including first and second input signals (DP, DM) and generates a single-ended output signal. The receiver circuit includes first and second comparators that receive the differential input signal and generate respective first and second differential output signals. A current summer is connected to the first and second comparators and receives the first and second differential output signals and generates a third differential output signal. A differential to single-ended converter is connected to the current summer and receives the third differential output signal and generates the single-ended output signal. The differential input signal varies from a ground voltage level to an external reference voltage level (VUSB), while the first and second comparators are made with devices that operate at an internal reference voltage level that is lower than the external reference voltage level.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: August 19, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Divya Tripathi, Jaideep Banerjee, Qadeer A. Khan
  • Publication number: 20070279125
    Abstract: A differential receiver circuit receives a differential input signal including first and second input signals (DP, DM) and generates a single-ended output signal. The receiver circuit includes first and second comparators that receive the differential input signal and generate respective first and second differential output signals. A current summer is connected to the first and second comparators and receives the first and second differential output signals and generates a third differential output signal. A differential to single-ended converter is connected to the current summer and receives the third differential output signal and generates the single-ended output signal. The differential input signal varies from a ground voltage level to an external reference voltage level (VUSB), while the first and second comparators are made with devices that operate at an internal reference voltage level that is lower than the external reference voltage level.
    Type: Application
    Filed: May 30, 2006
    Publication date: December 6, 2007
    Inventors: Divya Tripathi, Jaideep Banerjee, Qadeer A. Khan
  • Publication number: 20070152739
    Abstract: A power management system for managing power in an integrated circuit includes a controller and a voltage generator. The controller generates a control signal based on one or more process corners of the integrated circuit. The voltage generator generates a supply voltage based on the control signal, and provides the supply voltage to the integrated circuit to manage the power within the integrated circuit.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 5, 2007
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Jaideep Banerjee, Tushar Nandurkar
  • Patent number: 7135842
    Abstract: A regulated power source for supplying power to an external circuit includes a voltage sensing circuit and a voltage regulator. The voltage sensing circuit generates a feedback voltage by comparing voltage drops at a plurality of sense points within the external circuit. The feedback voltage is based on the maximum voltage drop at the sense points. The voltage regulator regulates the voltage supplied to the external circuit in accordance with the feedback voltage.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: November 14, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jaideep Banerjee, Tushar S. Nandurkar
  • Publication number: 20060170402
    Abstract: A regulated power source for supplying power to an external circuit includes a voltage sensing circuit and a voltage regulator. The voltage sensing circuit generates a feedback voltage by comparing voltage drops at a plurality of sense points within the external circuit. The feedback voltage is based on the maximum voltage drop at the sense points. The voltage regulator regulates the voltage supplied to the external circuit in accordance with the feedback voltage.
    Type: Application
    Filed: January 31, 2005
    Publication date: August 3, 2006
    Inventors: Jaideep Banerjee, Tushar Nandurkar
  • Patent number: 6933772
    Abstract: A low drop out voltage regulator (10) that receives an input voltage and generates a substantially constant output voltage includes a gain stage (12), a buffer stage (14), an output driver transistor (16), and first and second load current sense circuits (18, 20). The first load current sense circuit is connected between the output driver transistor and the buffer stage and adaptively increases a bias current of the buffer stage as a function of the load current. The second load current sense circuit is connected between the output driver transistor and the gain stage and adaptively decreases a bias current of the gain stage as the load current increases.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: August 23, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jaideep Banerjee, Tushar S Nandurkar
  • Publication number: 20050168272
    Abstract: A low drop out voltage regulator (10) that receives an input voltage and generates a substantially constant output voltage includes a gain stage (12), a buffer stage (14), an output driver transistor (16), and first and second load current sense circuits (18, 20). The first load current sense circuit is connected between the output driver transistor and the buffer stage and adaptively increases a bias current of the buffer stage as a function of the load current. The second load current sense circuit is connected between the output driver transistor and the gain stage and adaptively decreases a bias current of the gain stage as the load current increases.
    Type: Application
    Filed: February 2, 2004
    Publication date: August 4, 2005
    Inventors: Jaideep Banerjee, Tushar Nandurkar