Patents by Inventor Jaideep Muhkerjee

Jaideep Muhkerjee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7409328
    Abstract: A system for communicating simulation solutions between circuit components in a hierarchical data structure includes a simulator module having one or more computer programs for representing the circuit as a hierarchically arranged set of branches, which includes a root branch and a plurality of other branches logically organized in a graph. The hierarchically arranged set of branches includes a first branch that contains one or more driver leaf circuits and a second branch that also contains one or more receiver leaf circuits, where the first branch and second branch are interconnected in the graph through a third branch at a higher hierarchical level in the graph than the first and second branches.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: August 5, 2008
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bruce W. McGaughy, Jun Kong, Peter Frey, Jaideep Muhkerjee
  • Patent number: 7181383
    Abstract: A system for simulating a circuit having hierarchical data structure includes a simulator module having one or more computer programs for 1) creating a static database in accordance with a netlist description of the circuit, where the static database contains topology information of the circuit; 2) selecting a group circuit for simulation, where the group circuit contains one or more leaf circuits selected from the first branch and the second branch; 3) creating a dynamic database for representing the group circuit, where the dynamic database includes references to the static database for fetching topology information dynamically during simulation; and 4) simulating the group circuit in accordance with the dynamic database. Since the system duplicates and reproduces only the relevant dynamic information when necessary, the disclosed circuit simulator uses less memory and produces better performance.
    Type: Grant
    Filed: November 26, 2003
    Date of Patent: February 20, 2007
    Assignee: Cadence Design Systems, Inc.
    Inventors: Bruce W. McGaughy, Prashant Karhade, Jaideep Muhkerjee, Jun Kong