Patents by Inventor Jaidev Prasad

Jaidev Prasad has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11922182
    Abstract: A system comprises data processing hardware and memory hardware. The memory hardware is in communication with the data processing hardware, and stores instructions that, when executed on the data processing hardware, cause the data processing hardware to perform a plurality of operations. In some examples, one of the operations may include receiving instance management configuration data for a single-tenant software-as-a-service (SaaS) application. Another operation may include further include receiving an image of the single-tenant SaaS application. Yet another operation can include generating, by the control plane manager, a control plane based on the instance management configuration data. The control plane is configured to create multiple instances of the single-tenant SaaS application based on the received image, and to manage the instances of the single-tenant SaaS application based on the received instance management configuration data.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: March 5, 2024
    Assignee: Google LLC
    Inventors: Roy Peterkofsky, William Earl, Martin Taillefer, Michael Dahlin, Chandra Prasad, Jaroslaw Kowalski, Anna Berenberg, Kristian Kennaway, Alexander Mohr, Jaidev Haridas
  • Publication number: 20130067284
    Abstract: A method of coordinating trace information in a multiprocessor system includes receiving processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a coherence indicator that demarks selective shared memory transactions. Coherence manager trace information is generated for each of the processors. The coherence manager trace information for each processor includes trace metrics and a coherence indicator.
    Type: Application
    Filed: September 10, 2012
    Publication date: March 14, 2013
    Applicant: MIPS TECHNOLOGIES, INC.
    Inventors: Thomas Benjamin Berg, Ryan C. Kinter, Jaidev Prasad Patwardhan, Radhika Thekkath
  • Patent number: 8230202
    Abstract: A computer readable storage medium includes executable instructions to characterize a coherency controller. The executable instructions define ports to receive processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a condensed coherence indicator. Circuitry produces a trace stream with trace metrics and condensed coherence indicators.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: July 24, 2012
    Assignee: MIPS Technologies, Inc.
    Inventors: Thomas Benjamin Berg, Ryan C. Kinter, Jaidev Prasad Patwardhan, Radhika Thekkath
  • Publication number: 20090249045
    Abstract: A computer readable storage medium includes executable instructions to characterize a coherency controller. The executable instructions define ports to receive processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a condensed coherence indicator. Circuitry produces a trace stream with trace metrics and condensed coherence indicators.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 1, 2009
    Applicant: MIPS TECHNOLOGIES, INC.
    Inventors: Thomas Benjamin BERG, Ryan C. KINTER, Jaidev Prasad PATWARDHAN, Radhika THEKKATH
  • Publication number: 20090249046
    Abstract: A method of coordinating trace information in a multiprocessor system includes receiving processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a coherence indicator that demarks selective shared memory transactions. Coherence manager trace information is generated for each of the processors. The coherence manager trace information for each processor includes trace metrics and a coherence indicator.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 1, 2009
    Applicant: MIPS TECHNOLOGIES, INC.
    Inventors: Thomas Benjamin BERG, Ryan C. KINTER, Jaidev Prasad PATWARDHAN, Radhika THEKKATH
  • Publication number: 20090148366
    Abstract: A process of recovering magnesium oxide from a source of magnesium sulfate includes the steps of providing a source of magnesium sulfate in solution that is derived from part of a process that is associated with the leaching of a metal containing ore or concentrate; converting the magnesium sulfate in solution to solid magnesium sulfate; contacting the solid magnesium sulfate with elemental sulfur in a reducing atmosphere; and recovering the magnesium as magnesium oxide, and the sulfur as sulfur dioxide gas.
    Type: Application
    Filed: June 19, 2008
    Publication date: June 11, 2009
    Inventors: Eric Girvan Roche, Jaidev Prasad
  • Publication number: 20080271571
    Abstract: An atmospheric leaching process in the recovery of nickel and cobalt from a lateritic ore, the lateritic ore including a low magnesium ore fraction and a high magnesium ore fraction, the process including the steps of: (a) forming an aqueous pulp of the lateritic ore, (b) leaching the aqueous pulp with a concentrated mineral acid at atmospheric pressure to produce a slutty containing a pregnant leach liquor and a leach residue, (c) treating the pregnant leach liquor either separately or as part of the slurry to recover dissolved nickel and cobalt therefrom, leaving a magnesium barren solution, (d) treating the magnesium containing solution to recover a magnesium containing salt therefrom.
    Type: Application
    Filed: March 25, 2008
    Publication date: November 6, 2008
    Inventors: Houyuan Liu, Eric Girvan Roche, Jaidev Prasad