Patents by Inventor Jaidev Prasad Patwardhan

Jaidev Prasad Patwardhan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and Method for Low Overhead Correlation of Multi-Processor Trace Information
    Publication number: 20130067284
    Abstract: A method of coordinating trace information in a multiprocessor system includes receiving processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a coherence indicator that demarks selective shared memory transactions. Coherence manager trace information is generated for each of the processors. The coherence manager trace information for each processor includes trace metrics and a coherence indicator.
    Type: Application
    Filed: September 10, 2012
    Publication date: March 14, 2013
    Applicant: MIPS TECHNOLOGIES, INC.
    Inventors: Thomas Benjamin Berg, Ryan C. Kinter, Jaidev Prasad Patwardhan, Radhika Thekkath
  • Apparatus and method for condensing trace information in a multi-processor system
    Patent number: 8230202
    Abstract: A computer readable storage medium includes executable instructions to characterize a coherency controller. The executable instructions define ports to receive processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a condensed coherence indicator. Circuitry produces a trace stream with trace metrics and condensed coherence indicators.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: July 24, 2012
    Assignee: MIPS Technologies, Inc.
    Inventors: Thomas Benjamin Berg, Ryan C. Kinter, Jaidev Prasad Patwardhan, Radhika Thekkath
  • APPARATUS AND METHOD FOR LOW OVERHEAD CORRELATION OF MULTI-PROCESSOR TRACE INFORMATION
    Publication number: 20090249046
    Abstract: A method of coordinating trace information in a multiprocessor system includes receiving processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a coherence indicator that demarks selective shared memory transactions. Coherence manager trace information is generated for each of the processors. The coherence manager trace information for each processor includes trace metrics and a coherence indicator.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 1, 2009
    Applicant: MIPS TECHNOLOGIES, INC.
    Inventors: Thomas Benjamin BERG, Ryan C. KINTER, Jaidev Prasad PATWARDHAN, Radhika THEKKATH
  • APPARATUS AND METHOD FOR CONDENSING TRACE INFORMATION IN A MULTI-PROCESSOR SYSTEM
    Publication number: 20090249045
    Abstract: A computer readable storage medium includes executable instructions to characterize a coherency controller. The executable instructions define ports to receive processor trace information from a set of processors. The processor trace information from each processor includes a processor identity and a condensed coherence indicator. Circuitry produces a trace stream with trace metrics and condensed coherence indicators.
    Type: Application
    Filed: March 31, 2008
    Publication date: October 1, 2009
    Applicant: MIPS TECHNOLOGIES, INC.
    Inventors: Thomas Benjamin BERG, Ryan C. KINTER, Jaidev Prasad PATWARDHAN, Radhika THEKKATH