Patents by Inventor Jaiminkumar MEHTA

Jaiminkumar MEHTA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12261611
    Abstract: Methods and systems for determining clock signals for audio processing using different operating modes are provided. In one aspect, a transition control word is determined to transition from a first control word for a first operating mode to a second control word for the second operating mode. The transition control word may be used to process the received audio signal while transitioning between the operating modes. After the transition, the second control word may be used to process the received audio signal using the second operating mode. The transition control word may be used to transition between various aspects of the operating modes, including different frequencies or resolutions, control systems, power levels, and more.
    Type: Grant
    Filed: July 16, 2023
    Date of Patent: March 25, 2025
    Assignee: Cirrus Logic, Inc.
    Inventors: Jianqi Chen, Jaiminkumar Mehta, Bhoodev Kumar, John L. Melanson
  • Publication number: 20250023573
    Abstract: Methods and systems for determining clock signals for audio processing using different operating modes are provided. In one aspect, a transition control word is determined to transition from a first control word for a first operating mode to a second control word for the second operating mode. The transition control word may be used to process the received audio signal while transitioning between the operating modes. After the transition, the second control word may be used to process the received audio signal using the second operating mode. The transition control word may be used to transition between various aspects of the operating modes, including different frequencies or resolutions, control systems, power levels, and more.
    Type: Application
    Filed: July 16, 2023
    Publication date: January 16, 2025
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Jianqi Chen, Jaiminkumar Mehta, Bhoodev Kumar, John L. Melanson
  • Patent number: 12047757
    Abstract: A method may include measuring a physical quantity associated with a load driven by an amplifier, generating a windowing function having a variable length and based on a number of samples of the physical quantity to be processed, applying the windowing function to the physical quantity, performing a transform on the physical quantity as filtered by the windowing function, and determining a characteristic of the load based on the transform.
    Type: Grant
    Filed: May 20, 2022
    Date of Patent: July 23, 2024
    Assignee: Cirrus Logic Inc.
    Inventors: Viral Parikh, Jaiminkumar Mehta, Ryan Hellman
  • Publication number: 20230142189
    Abstract: A method may include measuring a physical quantity associated with a load driven by an amplifier, generating a windowing function having a variable length and based on a number of samples of the physical quantity to be processed, applying the windowing function to the physical quantity, performing a transform on the physical quantity as filtered by the windowing function, and determining a characteristic of the load based on the transform.
    Type: Application
    Filed: May 20, 2022
    Publication date: May 11, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Viral PARIKH, Jaiminkumar MEHTA, Ryan HELLMAN
  • Patent number: 11489534
    Abstract: Digital-to-analog converter (DAC) architecture, comprising: a matrix DAC array comprising a plurality of cells arranged in a first dimension and a second dimension, each cell comprising a local decoder configured to transition the cell between at least two states; and decoding circuitry configured to: receive a digital input signal; and control the plurality of local decoders based on a received digital input signal, wherein each incremental change in the digital input signal results in a transition of a single cell of the plurality of cells such that the plurality of cells transition in sequence, the sequence of transitions of the plurality of cells defining a path through the DAC array; wherein when the path proceeds in the first dimension, the path proceeds to an adjacent cell of the plurality of cells at least 50% of the time; and wherein when the path proceeds in the second dimension, the path proceeds to an adjacent cell of the plurality of cells at least 50% of the time.
    Type: Grant
    Filed: October 11, 2021
    Date of Patent: November 1, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Seung Bae Lee, Sunny Bhagia, Jaiminkumar Mehta, Anindya Bhattacharya, John L. Melanson
  • Patent number: 10033427
    Abstract: A system for reducing a local oscillator leakage component. The system includes a transmitter channel to transmit data modulated using a transmitter local oscillator frequency. A transmitted signal includes a transmitter local oscillator leakage component. The system also includes a receiver channel to receive the transmitted signal using a receiver local oscillator signal having a frequency offset from the transmitter local oscillator frequency. The received signal includes the transmitter local oscillator leakage component isolated from one or more receiver impairments. The system further includes a feedback loop from the receiver channel to the transmitter channel to identify a power of the isolated transmitter local oscillator leakage component and to generate a local oscillator leakage cancellation signal based on the identified power.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: July 24, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hunsoo Choo, Nikolaus Klemmer, Jaiminkumar Mehta
  • Publication number: 20150365128
    Abstract: A system for reducing a local oscillator leakage component. The system includes a transmitter channel to transmit data modulated using a transmitter local oscillator frequency. A transmitted signal includes a transmitter local oscillator leakage component. The system also includes a receiver channel to receive the transmitted signal using a receiver local oscillator signal having a frequency offset from the transmitter local oscillator frequency. The received signal includes the transmitter local oscillator leakage component isolated from one or more receiver impairments. The system further includes a feedback loop from the receiver channel to the transmitter channel to identify a power of the isolated transmitter local oscillator leakage component and to generate a local oscillator leakage cancellation signal based on the identified power.
    Type: Application
    Filed: June 11, 2015
    Publication date: December 17, 2015
    Inventors: Hunsoo CHOO, Nikolaus KLEMMER, Jaiminkumar MEHTA
  • Patent number: 8588286
    Abstract: A method of cancelling alien noise in coordinated DSL lines, a method of smoothing an alien noise covariance estimate, and a processor and modem for cancelling alien noise in coordinated DSL lines. In one embodiment, the method of cancelling alien noise includes: (1) estimating alien noise vectors for at least some training symbols, (2) arranging the alien noise vectors in a matrix dimensioned for a number of coordinated DSL lines, (3) orthonormally transforming the matrix into a lower-triangular matrix and (4) computing alien noise prediction filters from the lower-triangular matrix.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: November 19, 2013
    Assignee: XW, LLC
    Inventors: Naofal M. Al-Dhahir, Oren E. Eliezer, Jaiminkumar A. Mehta, Dennis I. Robbins, Aaron M. Lancour, Aditya Awasthi
  • Publication number: 20120093204
    Abstract: A method of cancelling alien noise in coordinated DSL lines, a method of smoothing an alien noise covariance estimate, and a processor and modem for cancelling alien noise in coordinated DSL lines. In one embodiment, the method of cancelling alien noise includes: (1) estimating alien noise vectors for at least some training symbols, (2) arranging the alien noise vectors in a matrix dimensioned for a number of coordinated DSL lines, (3) orthonormally transforming the matrix into a lower-triangular matrix and (4) computing alien noise prediction filters from the lower-triangular matrix.
    Type: Application
    Filed: April 14, 2011
    Publication date: April 19, 2012
    Inventors: Naofal M. Al-Dhahir, Oren E. Eliezer, Jaiminkumar A. Mehta, Dennis I. Robbins, Aaron M. Lancour, Aditya Awasthi