Abstract: A device includes a battery current sense circuit configured to generate a battery current feedback voltage based on a current provided to a battery, a current regulation feedback loop configured to regulate the current provided to the battery based on the battery current feedback voltage and a configurable battery current reference voltage, and a precharge regulation feedback loop configured to regulate the current provided to the battery based on the battery current feedback voltage and a configurable precharge reference voltage. The device also includes a processor configured to set the battery current reference voltage to a first value and set the precharge current reference voltage to a second value. The first value is less than the second value during a transition state.

Abstract: This disclosure relates to a multiphase converter design with multi-path phase management circuit and output logic. The phase management circuit and output logic can be employed to implement phase adding and shedding operations based on input and output current information and based on control signals for a power stage of the converter. In some examples, the design employs an estimate of an average output current based on a current at an input of the converter for phase control. In additional examples, the design employs cycle-by-cycle current limit and maximum duty-cycle signals to enable phase quickly during load transient. In further examples, the design employs low input and output-current sensed signals for efficient phase shedding and power saving. The design herein improves an overall accuracy of phase adding and shedding, load transient response performance, an operational efficiency and thermal performance of multiphase converter.

Abstract: A device includes a battery current sense circuit configured to generate a battery current feedback voltage based on a current provided to a battery, a current regulation feedback loop configured to regulate the current provided to the battery based on the battery current feedback voltage and a configurable battery current reference voltage, and a precharge regulation feedback loop configured to regulate the current provided to the battery based on the battery current feedback voltage and a configurable precharge reference voltage. The device also includes a processor configured to set the battery current reference voltage to a first value and set the precharge current reference voltage to a second value. The first value is less than the second value during a transition state.

Abstract: This disclosure relates to a multiphase converter design with multi-path phase management circuit and output logic. The phase management circuit and output logic can be employed to implement phase adding and shedding operations based on input and output current information and based on control signals for a power stage of the converter. In some examples, the design employs an estimate of an average output current based on a current at an input of the converter for phase control. In additional examples, the design employs cycle-by-cycle current limit and maximum duty-cycle signals to enable phase quickly during load transient. In further examples, the design employs low input and output-current sensed signals for efficient phase shedding and power saving. The design herein improves an overall accuracy of phase adding and shedding, load transient response performance, an operational efficiency and thermal performance of multiphase converter.

Abstract: A device includes a battery current sense circuit configured to generate a battery current feedback voltage based on a current provided to a battery, a current regulation feedback loop configured to regulate the current provided to the battery based on the battery current feedback voltage and a configurable battery current reference voltage, and a precharge regulation feedback loop configured to regulate the current provided to the battery based on the battery current feedback voltage and a configurable precharge reference voltage. The device also includes a processor configured to set the battery current reference voltage to a first value and set the precharge current reference voltage to a second value. The first value is less than the second value during a transition state.