Patents by Inventor Jaishankar M. Menon

Jaishankar M. Menon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5706443
    Abstract: A system that enables pipelining of data to and from a memory includes multiple control block data structures which indicate amounts of data stored in the memory. An input port device receives and stores in memory, data segments of a received data message and only updates status information in the software control blocks when determined quantities of the data segments are stored. An output port is responsive to a request for transmission of a portion of the received data and to a signal from the input port that at least a first control count of data segments of the received data are present in memory. The output port then outputs the stored data segments from memory but discontinues the action if, before the required portion of the received data is outputted, software control blocks indicate that no further stored data segments are available for outputting.
    Type: Grant
    Filed: May 11, 1994
    Date of Patent: January 6, 1998
    Assignee: International Business Machines Corporation
    Inventors: James T. Brady, Damon W. Finney, Michael H. Hartung, Donald J. Lang, Jaishankar M. Menon, David R. Nowlen, Calvin K. Tang
  • Patent number: 5579475
    Abstract: The data contents of up to two concurrently failed or erased DASDs can be reconstituted where the data is distributed across M DASDs as an (M-1)*M block array and where (1) the (M-1)st DASD contains the simple parity taken over each of the array diagonals in diagonal major order in the same mode (odd/even) as that exhibited by the major diagonal of the array and (2) where the M-th DASD contains the simple even parity over each of the rows in row major order. Relatedly, short write updates require fewer operations for data blocks located off the major data array diagonal.
    Type: Grant
    Filed: August 24, 1995
    Date of Patent: November 26, 1996
    Assignee: International Business Machines Corporation
    Inventors: Miguel M. Blaum, James T. Brady, Jehoshua Bruck, Jaishankar M. Menon
  • Patent number: 5577211
    Abstract: A computing system includes plural nodes that are connected by a communications network. Each node comprises a communications interface that enables an exchange of messages with other nodes. A ready queue is maintained in a node and includes plural message entries, each message entry indicating an output message control data structure. The node further includes memory for storing plural output message control data structures, each including one or more chained further monrtol data structures that define data comprising a message or a portion of a message that is to be dispatched. Control data structures that are chained from an output messsage control data structure exhibit a sequence dependincy. A processor is controlled by the ready queue and enables dispatch of portions of the message designated by an output message control data structure and associated further control structures.
    Type: Grant
    Filed: May 11, 1994
    Date of Patent: November 19, 1996
    Assignee: IBM Corporation
    Inventors: Narasimhareddy L. Annapareddy, James T. Brady, Damon W. Finney, Richard F. Freitas, Michael H. Hartung, Michael A. Ko, Noah R. Mendelsohn, Jaishankar M. Menon, David R. Nowlen, Shin-Yuan Tzou
  • Patent number: 5574882
    Abstract: A system and method are provided that is used by software implemented Redundancy Array of Inexpensive Disk (RAID) arrays to achieve adequate performance and reliability, as well as to improve performance or low cost hardware Raids. The enhancements to the basic RAID implementation speeds up recovery time for software RAIDS. A method is provided for storing data in an array of storage devices. A plurality of block locations on the storage devices are logically arranged as a parity group wherein a parity block stored in a block location as part of a parity group is logically derived from the combination of data blocks stored in the parity group, and each block in a parity group is stored on a different storage device. A plurality of parity groups are grouped into a parity group set. A request is received to write a new data block location on a storage device. The old data block stored at the block location is read. The new data block is written to the block location.
    Type: Grant
    Filed: March 3, 1995
    Date of Patent: November 12, 1996
    Assignee: International Business Machines Corporation
    Inventors: Jaishankar M. Menon, James C. Wyllie, Geoffrey A. Riegel
  • Patent number: 5551003
    Abstract: Seek affinity is preserved in a segment oriented, cached, log structured array (LSA) of DASDs responsive to accesses dominated by sequential read and random writes of logical tracks stored in the segments. This is achieved by collecting all the write modified read active tracks and clean read active tracks either destaged from the cache or garbage collected from the LSA and rewriting them out to the LSA as segments into regions of contiguous segments of read active tracks. Also, all write modified read inactive tracks and clean read inactive tracks either destaged from cache or garbage collected from the LSA are collected and rewritten out to the LSA as segments into regions of contiguous segments of read inactive tracks. Garbage collection is initiated when the detected free space in a region falls below a threshold and continues until the collected segments exceed a second threshold.
    Type: Grant
    Filed: February 14, 1994
    Date of Patent: August 27, 1996
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Mattson, Jaishankar M. Menon
  • Patent number: 5542066
    Abstract: A controller for a disk array with parity and sparing includes a non-volatile cache memory and optimizes the destaging process for blocks from the cache memory to both maximize the cache hit ratio and minimize disk utilization. The invention provides a method for organizing the disk array into segments and dividing the cache memory into groups in order of least recently used memory locations and then determining metrics that permit the disk array controller to identify the cache memory locations having the most dirty blocks by segment and group and to identify the utilization rates of the disks. These characteristics are considered to determine when, what, and how to destage. For example, in terms of maximizing the cache hit ratio, when the percentage of dirty blocks in a particular group of the cache memory locations reaches a predetermined level, destaging is begun. The destaging operation continues until the percentage of dirty blocks decreases to a predetermined level.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: July 30, 1996
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Mattson, Jaishankar M. Menon
  • Patent number: 5506979
    Abstract: Variable length records can be accessed from an array of N+2 synchronous fixed block formatted DASDs in a single pass and in the presence of a single DASD failure if each record is partitioned into a variable number of K fixed length blocks, the blocks are written on the DASDs in column major order K modulo (N+1), the order is constrained such that the first block of each record resides on the (N+l)st DASD, a parity block for each column resides on an (N+2)nd DASD, and each parity block spans N blocks in the same column from the first N DASDs and one block one column offset thereto on the (N+1)st DASD.
    Type: Grant
    Filed: April 2, 1991
    Date of Patent: April 9, 1996
    Assignee: International Business Machines Corporation
    Inventor: Jaishankar M. Menon
  • Patent number: 5488701
    Abstract: In a log structured array (LSA) storage subsystem, a method for recovering from a storage device failure which incorporates the LSA write and garbage collection procedures, thereby simplifying the recovery process and eliminating the need for dedicated or distributed sparing schemes. Data is distributed across the array in N+P parity groups. Upon a device failure, each lost data block is reconstructed from the remaining blocks of its parity group. The reconstructed block is then placed in the subsystem write buffer to be processed with incoming write data, and new parity is generated for the remaining N-1 data blocks of the group. A lost parity block is replaced by first moving one of the data blocks of its parity group to the write buffer, and then generating new parity for the remaining N-1 data blocks. Also disclosed is a storage subsystem implementing the preceding recovery method.
    Type: Grant
    Filed: November 17, 1994
    Date of Patent: January 30, 1996
    Assignee: International Business Machines Corporation
    Inventors: James T. Brady, Jaishankar M. Menon
  • Patent number: 5485571
    Abstract: Data regions, parity regions, and spare regions in a redundant array of storage units are distributed such that each storage unit in the array has the same number of parity regions before, during, and after a failure of one or more storage units such that there is a uniform workload distribution among the storage units during normal operation, during the rebuild process, and during operation after the rebuild and before repair or replacement of the failed unit. The array provides uniform workload distribution for one or more failures of storage units. The number of storage units and the number of storage regions per storage unit is specified once the number of regions in a parity group and the number of failures to be managed are specified. The data regions, parity regions, and spare regions are then placed to provide the uniform workload distribution.
    Type: Grant
    Filed: December 23, 1993
    Date of Patent: January 16, 1996
    Assignee: International Business Machines Corporation
    Inventor: Jaishankar M. Menon
  • Patent number: 5459853
    Abstract: A method for operating a synchronized array of fixed block (FBA) formatted Direct Access Storage Devices (DASDs) to store and update variable-length (CKD) formatted records. This method is suitable for use with DASDs that obtain high recording density by using read and write head technology requiring "micro-jogging" to adjust for differing read and write head alignment or banded disk architecture having a higher block count in the outer tracks than in the inner tracks. Magneto-resistive heads may require micro-jogging to realign the write head for recording after reading the physical track location. The invention employs a DASD staggered array architecture having logical tracks consisting of diagonal-major sequences of consecutive blocks arranged in a predetermined wrap-around manner such as a topological cylinder or torus.
    Type: Grant
    Filed: November 23, 1992
    Date of Patent: October 17, 1995
    Assignee: International Business Machines Corporation
    Inventors: John S. Best, Steven R. Hetzler, Roger F. Hoyt, Jaishankar M. Menon, Michael F. Mitoma
  • Patent number: 5418921
    Abstract: A method and means using a fast write in order to eliminate DASD time from the write response time as seen by the host; eliminate some DASD writes due to overwrites caused by later host writes to previously updated blocks in cache; and reduce DASD seeks because destages will be postponed until many destages can be done to a track or cylinder. This is effectuated by destaging from the cache only the least recently referenced original or updated block and all other original or updated blocks occupying the same logical track and ordered in a predefined lower LRU range, the destage being initiated responsive to a cache miss. The destaging step is selectable from a set of destaging steps varying in their robustness.
    Type: Grant
    Filed: May 5, 1992
    Date of Patent: May 23, 1995
    Assignee: International Business Machines Corporation
    Inventors: James E. Cortney, Jaishankar M. Menon
  • Patent number: 5416915
    Abstract: A method and system for minimizing seek affinity and enhancing write sensitivity in a direct access storage device (DASD) array are disclosed. SEEK affinity and WRITE efficiency are preserved in which logical cylinders, as recorded on the DASD array, are managed as individual log structured files (LSF). Tracks or segments of data and parity blocks having the same or different parity group affinity and stored on the same or different DASD cylindrical addresses are written into a directory managed buffer. Blocks having the same parity affinity and written to counterpart cylinders are written out from the buffer to spare space reserved as part of each DASD cylinder. Otherwise, blocks are updated in place in their DASD array location.
    Type: Grant
    Filed: December 11, 1992
    Date of Patent: May 16, 1995
    Assignee: International Business Machines Corporation
    Inventors: Richard L. Mattson, Jaishankar M. Menon
  • Patent number: 5375128
    Abstract: A method for update writing in an array of DASDs in a reduced number of DASD track cycles. The method involves distributing data and parity blocks for each parity group across the array in failure independent form and reserving unused space. During a first cycle, the old data and parity blocks are read. The new parity is calculated and shadow written into reserved unused space located before the old parity block recurs. The amended data is either written in place during a second cycle or shadow written into reserved space during a subsequent portion of the first cycle.
    Type: Grant
    Filed: October 18, 1990
    Date of Patent: December 20, 1994
    Assignee: IBM Corporation (International Business Machines Corporation)
    Inventors: Jaishankar M. Menon, James M. Kasson
  • Patent number: 5301297
    Abstract: A method and apparatus teaching insertion of addressing indirection to form and to access an array hierarchy expressly permitting the concurrency of a high level RAID array, the bandwidth and degraded mode operation sustainable by a lower level RAID array, and after a DASD failure minimum spanning involvement when the array is rebuilding and rewriting missing data to a spare logical device. Also, disclosed are the accessing of variable length records on the array hierarchy; array hierarchy in which RAID 5 arrays have dissimilar number of logic devices (lower level RAID arrays) and interleave depths; formation of logical arrays using fractional storage defined onto real DASD subsets; and the defining of logical devices onto DASDs distributed in the same or different physical clusters of DASDs and the rebuild operation thereof.
    Type: Grant
    Filed: July 3, 1991
    Date of Patent: April 5, 1994
    Assignee: IBM Corp. (International Business Machines Corp.)
    Inventors: Jaishankar M. Menon, Leighton C. Wood, Jr.
  • Patent number: 5283884
    Abstract: A method for managing cache accessing of CKD formatted records that uses a Predictive Track Table to reduce host delays resulting from cache write misses. Because a significant portion of CKD formatted DASD tracks contain records having no key fields, identical logical and physical cylinder and head (CCHH) fields and similar-sized data fields, a compact description of such records by record count and length data, indexed by track, can be quickly searched to determine the physical track location of a record update that misses the cache. The Predictive Track Table search is much faster than the host wait state imposed by access and search of the DASD to read the missing track into cache. If the updated record that misses cache is found within the set of records in the Predictive Track Table, then the update may be immediately written to cache and to a Non-Volatile Store (NVS) without a DASD read access. This update then may be later destaged asynchronously to the DASD from either the cache or the NVS.
    Type: Grant
    Filed: December 30, 1991
    Date of Patent: February 1, 1994
    Assignee: International Business Machines Corporation
    Inventors: Jaishankar M. Menon, John E. Lindley, Robert W. Shomler
  • Patent number: 5271012
    Abstract: A method and means for encoding data written onto an array of M synchronous DASDs and for rebuilding onto spare DASD array capacity when up to two array DASD fail. Data is mapped into the DASD array using an (M-1)*M data array as the storage model where M is a prime number. Pairs of simple parities are recursively encoded over data in respective diagonal major and intersecting row major order array directions. The encoding traverse covering a topologically cylindrical path. Rebuilding data upon unavailability of no more than two DASDs merely requires accessing the data array and repeating the encoding step where the diagonals are oppositely sloped and writing the rebuilt array back to onto M DASDs inclusive of the spare capacity.
    Type: Grant
    Filed: February 11, 1991
    Date of Patent: December 14, 1993
    Assignee: International Business Machines Corporation
    Inventors: Miguel M. Blaum, Hsieh T. Hao, Richard L. Mattson, Jaishankar M. Menon
  • Patent number: 5263145
    Abstract: A method and means for managing access to a logical track of KN blocks of which K are parity blocks. The KN blocks are distributed and stored in an array of N DASDs having K blocks per physical track per DASD. The array includes control means for securing synchronous access to selectable ones of the DASDs responsive to each access request. The method involves (a) formatting the blocks onto the array using a row major order modulus as the metric for balancing the data rate and concurrency (the number of DASDs bound per access) and (b) executing the random sequences of large and small access requests over the array.
    Type: Grant
    Filed: May 24, 1990
    Date of Patent: November 16, 1993
    Assignee: International Business Machines Corporation
    Inventors: James T. Brady, Ruth E. Cintron, Stephen Goldstein, Jean H. Wang Ju, Jaishankar M. Menon
  • Patent number: 5258984
    Abstract: A method and means in which data and parity blocks forming parity groups together with spare blocks are distributed over array block locations according to at least one combinatorial design, each group having N data and P parity blocks. The combinatorial designs yield uniform or balanced loading thereby minimizing the number of accesses to reconstruct missing data and parity blocks and their copyback into spare block locations, and, minimize the number of accesses to the reconstructed data referenced subsequent to its copyback. Distributions of the spare block capacity of one or two DASDs are shown over single and multiple arrays and shared among multiple arrays. Parity block distribution although ancillary to spare distribution enhances throughput and reduces the number of accesses for rebuild etc.
    Type: Grant
    Filed: June 13, 1991
    Date of Patent: November 2, 1993
    Assignee: International Business Machines Corporation
    Inventors: Jaishankar M. Menon, Richard L. Mattson, Spencer W. Ng
  • Patent number: 5257362
    Abstract: Write update of variable length records stored in row major order on an array of N DASDs is facilitated by utilizing the correlation between byte offsets of a variable length record and the byte offset of a byte level parity image of data stored on the same track across N-1 other DASDs.
    Type: Grant
    Filed: March 8, 1991
    Date of Patent: October 26, 1993
    Assignee: International Business Machines Corporation
    Inventor: Jaishankar M. Menon
  • Patent number: 5202799
    Abstract: One or more data-storing disk devices support logical tracks extending between radial recording zones of tracks in the device(s). Each data-storing disk in the device(s) is formatted into a plurality of radial recording zones of physical tracks, each radial recording zone having a like number of physical tracks, each physical track may be one circumvolution of a single spiral track. The physical tracks in the respective recording zones store a different number of data bytes. Each logical track including a plurality of said physical tracks; at least one of the physical tracks in each of the logical tracks is in a different one of the radial recording zones in different ones of the devices or in a single device. Described are an extended logical track and extended logical cylinder accessing methods and apparatus. Not all of the physical tracks of any of the devices or recording zones need be a member of any logical track.
    Type: Grant
    Filed: June 24, 1991
    Date of Patent: April 13, 1993
    Assignee: IBM Corporation
    Inventors: Steven R. Hetzler, Jaishankar M. Menon, Michael F. Mitoma