Patents by Inventor Jaisimha Bannur

Jaisimha Bannur has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7546399
    Abstract: In general, in one aspect, the disclosure describes an apparatus capable of queuing and de-queuing data stored in a plurality of queues. The apparatus includes a status storage device to track status for each of the plurality of queues, a status cache to track status for a subset of the plurality of queues that are undergoing processing, and a queuing engine to queue incoming data and de-queue outgoing data. The queuing engine receives and updates the status for the subset of the plurality of queues from the status cache and receives and updates the status for remaining queues from the status storage device.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: June 9, 2009
    Assignee: Intel Corporation
    Inventors: Anujan Varma, Robert C. Restrick, Jaisimha Bannur
  • Patent number: 7324537
    Abstract: In general, in one aspect, the disclosure describes a switching device that includes a plurality of ports. The ports operate at asymmetric speeds. The apparatus also includes a switching matrix to provide selective connectivity between the ports. The apparatus further includes a plurality of channels to connect the ports to the switching matrix. The number of channels associated with each port is determined by speed of the port.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: January 29, 2008
    Assignee: Intel Corporation
    Inventors: Ramaprasad Samudrala, Jaisimha Bannur, Anujan Varma
  • Patent number: 7246303
    Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a transmission module to split a data segment into a plurality of data stripes and transmit each data stripe over an associated data channel. The plurality of data channels are organized into at least one group and each group has an associated parity channel to transmit a parity stripe generated based on the data stripes within the group. The apparatus also includes a reception module to receive the plurality of data stripes and the at least one parity stripe. The apparatus further includes a controller to control the operation of the apparatus.
    Type: Grant
    Filed: March 24, 2003
    Date of Patent: July 17, 2007
    Assignee: Intel Corporation
    Inventors: Akash Bansal, Jaisimha Bannur, Anujan Varma
  • Patent number: 7080168
    Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a plurality of flow controllable queues containing data to be transmitted. The queues are organized by flow. The apparatus also includes a plurality of destinations to receive data from the plurality of queues. The apparatus further includes a controller to continually maintain an aggregate count of data ready for transmission to the destinations and determine next queue to transmit data from based at least partially on the aggregate counts.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: July 18, 2006
    Assignee: Intel Corporation
    Inventors: Subhajit Dasgupta, Jaisimha Bannur, Anujan Varma
  • Patent number: 7062592
    Abstract: In general, in one aspect, the disclosure describes an apparatus for selecting a queue from a plurality of queues. The apparatus includes a hierarchal queue occupancy device to indicate an occupancy status of the plurality of queues, a next queue selector to select a queue based on said hierarchal queue occupancy device and a most recently serviced queue, and a queue identification register to identify a most recently serviced queue.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: June 13, 2006
    Assignee: Intel Corporation
    Inventors: Anujan Varma, Robert C. Restrick, Jaisimha Bannur
  • Patent number: 7000061
    Abstract: In general, in one aspect, the disclosure describes an apparatus capable to select a queue. The apparatus includes a queue occupancy device to indicate an occupancy status of the queues, a queue occupancy cache to record an update in occupancy status of a particular queue, a next queue selector to select a queue based on said queue occupancy device and a most recently serviced queue, and a queue identification register to identify a most recently serviced queue.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: February 14, 2006
    Assignee: Intel Corporation
    Inventors: Anujan Varma, Robert C. Restrick, Jaisimha Bannur
  • Publication number: 20050013251
    Abstract: In general, in one aspect, the disclosure describes a flow control hub that includes a scoreboard memory device to maintain flow control status for a plurality of flows. Each of the flows is identified by an associated index. The apparatus also includes an address decoder to receive a flow control message and to determine an associated index based on the address portion. The apparatus further includes an updater to update the flow control status in said memory device based on the received flow control message.
    Type: Application
    Filed: July 18, 2003
    Publication date: January 20, 2005
    Inventors: Hsuan-Wen Wang, Jaisimha Bannur, Anujan Varma
  • Publication number: 20050015388
    Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a plurality of flow controllable queues containing data to be transmitted. The queues are organized by flow. The apparatus also includes a plurality of destinations to receive data from the plurality of queues. The apparatus further includes a controller to continually maintain an aggregate count of data ready for transmission to the destinations and determine next queue to transmit data from based at least partially on the aggregate counts.
    Type: Application
    Filed: July 18, 2003
    Publication date: January 20, 2005
    Inventors: Subhajit Dasgupta, Jaisimha Bannur, Anujan Varma
  • Publication number: 20050013311
    Abstract: In general, in one aspect, the disclosure describes a switching device that includes a plurality of ports. The ports operate at asymmetric speeds. The apparatus also includes a switching matrix to provide selective connectivity between the ports. The apparatus further includes a plurality of channels to connect the ports to the switching matrix. The number of channels associated with each port is determined by speed of the port.
    Type: Application
    Filed: July 18, 2003
    Publication date: January 20, 2005
    Inventors: Ramaprasad Samudrala, Jaisimha Bannur, Anujan Varma
  • Publication number: 20040037302
    Abstract: In general, in one aspect, the disclosure describes an apparatus capable of queuing and de-queuing data stored in a plurality of queues. The apparatus includes a status storage device to track status for each of the plurality of queues, a status cache to track status for a subset of the plurality of queues that are undergoing processing, and a queuing engine to queue incoming data and de-queue outgoing data. The queuing engine receives and updates the status for the subset of the plurality of queues from the status cache and receives and updates the status for remaining queues from the status storage device.
    Type: Application
    Filed: March 24, 2003
    Publication date: February 26, 2004
    Inventors: Anujan Varma, Robert C. Restrick, Jaisimha Bannur
  • Publication number: 20040017778
    Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a transmission module to split a data segment into a plurality of data stripes and transmit each data stripe over an associated data channel. The plurality of data channels are organized into at least one group and each group has an associated parity channel to transmit a parity stripe generated based on the data stripes within the group. The apparatus also includes a reception module to receive the plurality of data stripes and the at least one parity stripe. The apparatus further includes a controller to control the operation of the apparatus.
    Type: Application
    Filed: March 24, 2003
    Publication date: January 29, 2004
    Inventors: Akash Bansal, Jaisimha Bannur, Anujan Varma
  • Publication number: 20030235188
    Abstract: In general, in one aspect, the disclosure describes an apparatus capable to select a queue. The apparatus includes a queue occupancy device to indicate an occupancy status of the queues, a queue occupancy cache to record an update in occupancy status of a particular queue, a next queue selector to select a queue based on said queue occupancy device and a most recently serviced queue, and a queue identification register to identify a most recently serviced queue.
    Type: Application
    Filed: March 20, 2003
    Publication date: December 25, 2003
    Inventors: Anujan Varma, Robert C. Restrick, Jaisimha Bannur
  • Publication number: 20030229844
    Abstract: In general, in one aspect, the disclosure describes an apparatus that includes a transmission module to split a data segment into a plurality of data stripes and transmit each data strip over an associated serial channel, a reception module to receive the plurality of data stripes over the associated serial channels and track a number of errors per channel, and a controller to deactivate a serial channel and reconfigure said transmission module and said reception module to utilize remaining data channels for striping data if the number of errors in the serial channel exceeds a threshold.
    Type: Application
    Filed: March 24, 2003
    Publication date: December 11, 2003
    Inventors: Akash Bansal, Jaisimha Bannur, Anujan Varma
  • Publication number: 20030182480
    Abstract: In general, in one aspect, the disclosure describes an apparatus for selecting a queue from a plurality of queues. The apparatus includes a hierarchal queue occupancy device to indicate an occupancy status of the plurality of queues, a next queue selector to select a queue based on said hierarchal queue occupancy device and a most recently serviced queue, and a queue identification register to identify a most recently serviced queue.
    Type: Application
    Filed: March 19, 2003
    Publication date: September 25, 2003
    Inventors: Anujan Varma, Robert C. Restrick, Jaisimha Bannur