Abstract: A method includes generating a set of virtual-machine-specific (VMS) encryption keys for a dedicated virtual machine, storing the set of VMS encryption keys in a protected memory, storing a first look-up table in the protected memory, and replacing an encryption key stored in a crypto unit with at least one VMS encryption key of the set of VMS encryption keys in an operation mode where the dedicated virtual machine is executed by a processor. The protected memory is selectively excluded from access by operating systems executable on a computer system. The look-up table being accessible only by firmware of the computer system.

Abstract: A method includes generating a set of virtual-machine-specific (VMS) encryption keys for a dedicated virtual machine, storing the set of VMS encryption keys in a protected memory, storing a first look-up table in the protected memory, and replacing an encryption key stored in a crypto unit with at least one VMS encryption key of the set of VMS encryption keys in an operation mode where the dedicated virtual machine is executed by a processor. The protected memory is selectively excluded from access by operating systems executable on a computer system. The look-up table being accessible only by firmware of the computer system.

Abstract: An approach for simultaneous multithreading in a processor. The approach comprises measuring SMT-performance value of a software code and measuring non-SMT-performance value the software code, comparing the SMT-performance value with the non-SMT performance value and dispatching the software code for execution mode by the processor based on the comparison, wherein the execution mode comprises SMT-mode and non-SMT-mode of the processor.

Abstract: An approach for simultaneous multithreading in a processor. The approach comprises measuring SMT-performance value of a software code and measuring non-SMT-performance value the software code, comparing the SMT-performance value with the non-SMT performance value and dispatching the software code for execution mode by the processor based on the comparison, wherein the execution mode comprises SMT-mode and non-SMT-mode of the processor.

Abstract: A system and method of managing a plurality of assets by associating a smart card with a compute subsystem by installing a database on the smart card and embedding an identifier of the compute subsystem. The system and method, in turn, may receive a request to access an asset of a compute subsystem; verify that a feature of the database is enabled in response to the request, the feature corresponding to the asset; and grant the access to access the asset upon the verifying of the feature.

Abstract: Aspects include encrypting data exchanged between two computer systems. A method includes accessing content of a memory, via a memory address, by at least one processing unit of one of the computer systems. Based on the accessing being a write operation, the content of the memory is encrypted using a memory encryption key, the encrypting is by a crypto unit of the at least one of the processing units. Based on the accessing being a read operation, the content of the memory is decrypted using the same memory encryption key, the decrypting is by a crypto unit of the at least once of the processing units. Remote direct memory access is established via memory addresses between the computer systems, the establishing including at least one of the computer systems locally storing a respective network encryption key as memory encryption keys for memory areas used for the data exchange.

Abstract: Routing communication in a data processing system. Communication is routed from a communication client having no own communication stack through a first own communication stack of a first communication bridge, and through a second own communication stack of a second communication bridge. Routing between the communication client and the first and the second communication bridges uses a communication mechanism that does not include an own communication stack. One of the first or the second communication bridges is configured to act as a master communication bridge, and the other of the second or the first communication bridges is configured to act as a slave communication bridge.

Abstract: Suspending multiple virtual machines executed simultaneously a hypervisor a data processing system, including: sending, by a control instance, a request to the hypervisor to suspend virtual machines at a given future first point in time; the hypervisor determining if its virtual machines can be suspended at the first point in time, and, if the suspending is possible, returning a suspend handle to the control instance and storing the suspend handle, otherwise returning an invalid handle; when receiving a suspend handle from the hypervisor in return to the request to suspend virtual machines, the control instance sending a suspend command to the hypervisor, wherein the respective suspend handle is provided to the corresponding hypervisor; the hypervisor determining if the received suspend handle is equal to its stored handle and, if yes, suspending its virtual machines at the first point in time.

Abstract: Suspending multiple virtual machines executed simultaneously a hypervisor a data processing system, including: sending, by a control instance, a request to the hypervisor to suspend virtual machines at a given future first point in time; the hypervisor determining if its virtual machines can be suspended at the first point in time, and, if the suspending is possible, returning a suspend handle to the control instance and storing the suspend handle, otherwise returning an invalid handle; when receiving a suspend handle from the hypervisor in return to the request to suspend virtual machines, the control instance sending a suspend command to the hypervisor, wherein the respective suspend handle is provided to the corresponding hypervisor; the hypervisor determining if the received suspend handle is equal to its stored handle and, if yes, suspending its virtual machines at the first point in time.

Abstract: Data collection is facilitated by a multi-threaded processor. One thread of the processor obtains data placed in a buffer by another thread of the processor. The thread placing the data in the buffer is an execution thread executing a customer application and the one thread obtaining the data from the buffer is an assist thread. The assist thread stores the data obtained from the buffer in a selected location, such as a cache, main memory, a measurement control block, a persistent storage device or a network.

Abstract: Data collection is facilitated by a multi-threaded processor. One thread of the processor obtains data placed in a buffer by another thread of the processor. The thread placing the data in the buffer is an execution thread executing a customer application and the one thread obtaining the data from the buffer is an assist thread. The assist thread stores the data obtained from the buffer in a selected location, such as a cache, main memory, a measurement control block, a persistent storage device or a network.

Abstract: A method, a computer program product, and a computer system for processing interrupt requests in a computer system. The computer system disables, for a processor, an interrupt request for threads other than an interrupt request handling thread. The computer system configures the processor to route the interrupt request to the interrupt request handling thread. The computer system determines, by the interrupt request handling thread, whether one of the threads needs to process the interrupt request. The computer presents, by the interrupt request handling thread, the interrupt request to the one of the threads, in response to determining that the one of the threads needs to process the interrupt request.

Abstract: A method, a computer program product, and a computer system for processing interrupt requests in a computer system. The computer system disables, for a processor, an interrupt request for threads other than an interrupt request handling thread. The computer system configures the processor to route the interrupt request to the interrupt request handling thread. The computer system determines, by the interrupt request handling thread, whether one of the threads needs to process the interrupt request. The computer presents, by the interrupt request handling thread, the interrupt request to the one of the threads, in response to determining that the one of the threads needs to process the interrupt request.

Abstract: In an approach to grouping tasks initialized by a first user, one or more computer processors receive a first task initialization by a first user. The one or more computer processors determine whether one or more additional tasks contained in one or more task groups are in use by the first user. Responsive to determining one or more additional tasks contained in one or more task groups are in use, the one or more computer processors determine whether the first task is related to at least one task of the one or more additional tasks. Responsive to determining the first task is related to at least one task of the one or more additional tasks, the one or more computer processors add the first task to the task group containing the at least one related task of the one or more additional tasks.

Abstract: Remotely awakening an electronic device, in which an apparatus includes a power supply to supply external power; a receiver for an electromagnetic signal; a capacitor connected to the receiver; a switching circuit connected to the capacitor; a controller, being part of the electronic device, connected to receive power from the switching circuit and to provide a keep awake signal to the switching circuit. The switching circuit to connect the controller with the capacitor when the capacitor is loaded with a predefined amount of power via the receiver, and responsive to the keep awake signal to disconnect the controller from the capacitor and to connect the controller with the power supply afterwards. The controller performs an initialization phase in response to receiving power and enables the keep awake signal after completing the initialization phase.

Abstract: In an approach to grouping related tasks, one or more computer processors receive a first task initialization by a first user. The one or more computer processors determine whether one or more additional tasks contained in one or more task groups are in use by the first user. Responsive to determining one or more additional tasks contained in one or more task groups are in use, the one or more computer processors determine whether the first task is related to at least one task of the one or more additional tasks. Responsive to determining the first task is related to at least one task of the one or more additional tasks, the one or more computer processors add the first task to the task group containing the at least one related task of the one or more additional tasks.

Abstract: The invention relates to a method for managing virtual machine image disk usage comprising a disk image emulator for a virtual machine provided by a hypervisor, comprising the steps of providing at least a first disk image comprising a sequence of data blocks for accumulating write operations to the first disk image, providing at least a second disk image comprising a sequence of data blocks for permanently storing disk image data, and providing a disk cleaning process for transferring disk image data from the first disk image to the second disk image and deleting unused data blocks in the first and/or the second disk image.

Abstract: The invention relates to a method for managing virtual machine image disk usage comprising a disk image emulator for a virtual machine provided by a hypervisor, comprising the steps of providing at least a first disk image comprising a sequence of data blocks for accumulating write operations to the first disk image, providing at least a second disk image comprising a sequence of data blocks for permanently storing disk image data, and providing a disk cleaning process for transferring disk image data from the first disk image to the second disk image and deleting unused data blocks in the first and/or the second disk image.

Abstract: Protecting contents of storage in a computer system from unauthorized access. The computer system includes one or more processing units sharing the storage. Each of the processing units has at least one processor cache. Each processing unit respectively encrypts or decrypts, with a protected section key, data transferred between its processor cache and the storage, when data relates to the protected section used by the hypervisor; and each processing unit respectively encrypts or decrypts, with a virtual machine key, data transferred between its processor cache and the storage, when data relates to storage areas used by a virtual machine.

Abstract: Protecting contents of storage in a computer system from unauthorized access. The computer system includes one or more processing units sharing the storage. Each of the processing units has at least one processor cache. Each processing unit respectively encrypts or decrypts, with a protected section key, data transferred between its processor cache and the storage, when data relates to the protected section used by the hypervisor; and each processing unit respectively encrypts or decrypts, with a virtual machine key, data transferred between its processor cache and the storage, when data relates to storage areas used by a virtual machine.